* fixed broken powerpc compilation

* fixed imm24 constant matching on the arm

git-svn-id: trunk@1074 -

compiler/aasmtai.pas

@@ -554,6 +554,9 @@ interface
           function is_same_reg_move(regtype: Tregistertype):boolean;virtual;
           function spilling_get_operation_type(opnr: longint): topertype;virtual;
           function spilling_get_operation_type_ref(opnr: longint; reg: tregister): topertype;virtual;
+
+          function  Pass1(offset:longint):longint;virtual;abstract;
+          procedure Pass2(objdata:TAsmObjectdata);virtual;abstract;
        end;
        tai_cpu_class = class of tai_cpu_abstract;
 

compiler/arm/aasmcpu.pas

@@ -75,6 +75,7 @@ uses
       OT_IMMEDIATE24 = OT_IMM24;
       OT_SHIFTIMM  = OT_SHIFTEROP or OT_IMMSHIFTER;
       OT_SHIFTIMMEDIATE = OT_SHIFTIMM;
+      OT_IMMEDIATESHIFTER = OT_IMMSHIFTER;
 
       OT_IMMEDIATEFPU = OT_IMMTINY;
 
@@ -195,8 +196,8 @@ uses
          procedure ResetPass2;
          function  CheckIfValid:boolean;
          function GetString:string;
-         function Pass1(offset:longint):longint;virtual;
-         procedure Pass2(objdata:TAsmObjectdata);virtual;
+         function Pass1(offset:longint):longint;override;
+         procedure Pass2(objdata:TAsmObjectdata);override;
       protected
          procedure ppuloadoper(ppufile:tcompilerppufile;var o:toper);override;
          procedure ppuwriteoper(ppufile:tcompilerppufile;const o:toper);override;
@@ -875,7 +876,7 @@ implementation
                    s:=s+'mem';
                    addsize:=true;
                    if (ot and OT_AM2)<>0 then
-                     s:=s+' am2';
+                     s:=s+' am2 ';
                  end
                else
                  s:=s+'???';
@@ -886,7 +887,7 @@ implementation
                     s:=s+'8'
                   else
                    if (ot and OT_BITS16)<>0 then
-                    s:=s+'16'
+                    s:=s+'24'
                   else
                    if (ot and OT_BITS32)<>0 then
                     s:=s+'32'
@@ -1090,13 +1091,12 @@ implementation
                     begin
                       l:=ref^.offset;
                       if assigned(ref^.symbol) then
-                       inc(l,ref^.symbol.address);
-                      if (not assigned(ref^.symbol) or
-                          ((ref^.symbol.currbind<>AB_EXTERNAL) and (ref^.symbol.address<>0))) and
-                         (relsize>=-33554428) and (relsize<=33554428) and (relsize mod 4=0) then
-                       ot:=OT_IMM24
+                        inc(l,ref^.symbol.address);
+                      relsize:=(InsOffset+2)-l;
+                      if (relsize<-33554428) or (relsize>33554428) then
+                       ot:=OT_IMM32
                       else
-                       ot:=OT_IMM32 or OT_NEAR;
+                       ot:=OT_IMM24;
                     end;
                 end;
               top_local :

compiler/arm/armins.dat

@@ -349,7 +349,9 @@ reg32,reg32,reg32        \x25\x00\xB0                   ARM7
 [STRTcc]
 
 [SUBcc]
-reg32,reg32,shiftimm     \4\x0\x40                     ARM7
+reg32,reg32,shifterop     \4\x0\x40                     ARM7
+reg32,reg32,immshifter    \4\x0\x40                     ARM7
+reg32,reg32,reg32        \4\x0\x40                     ARM7
 ; reg32,reg32,reg32,reg32  \5\x0\x40                     ARM7
 ; reg32,reg32,reg32,imm    \6\x0\x40                     ARM7
 ; reg32,reg32,imm          \7\x2\x40                     ARM7

compiler/arm/armnop.inc

@@ -1,2 +1,2 @@
 { don't edit, this file is generated from armins.dat }
-111;
+113;

compiler/arm/armtab.inc

@@ -276,7 +276,7 @@
   (
     opcode  : A_LDM;
     ops     : 2;
-    optypes : (ot_memoryam5,ot_reglist,ot_none,ot_none);
+    optypes : (ot_memoryam4,ot_reglist,ot_none,ot_none);
     code    : #38#129;
     flags   : if_arm7
   ),
@@ -682,7 +682,21 @@
   (
     opcode  : A_SUB;
     ops     : 3;
-    optypes : (ot_reg32,ot_reg32,ot_shiftimmediate,ot_none);
+    optypes : (ot_reg32,ot_reg32,ot_shifterop,ot_none);
+    code    : #4#0#64;
+    flags   : if_arm7
+  ),
+  (
+    opcode  : A_SUB;
+    ops     : 3;
+    optypes : (ot_reg32,ot_reg32,ot_immediateshifter,ot_none);
+    code    : #4#0#64;
+    flags   : if_arm7
+  ),
+  (
+    opcode  : A_SUB;
+    ops     : 3;
+    optypes : (ot_reg32,ot_reg32,ot_reg32,ot_none);
     code    : #4#0#64;
     flags   : if_arm7
   ),

compiler/x86/aasmcpu.pas

@@ -238,8 +238,8 @@ interface
          procedure ResetPass1;
          procedure ResetPass2;
          function  CheckIfValid:boolean;
-         function  Pass1(offset:longint):longint;virtual;
-         procedure Pass2(objdata:TAsmObjectdata);virtual;
+         function  Pass1(offset:longint):longint;override;
+         procedure Pass2(objdata:TAsmObjectdata);override;
          procedure SetOperandOrder(order:TOperandOrder);
          function is_same_reg_move(regtype: Tregistertype):boolean;override;
          { register spilling code }