* x86: m128 etc. are now vector arrays (giving correct memory alignment) and "use_vectorfpu" will return True for these types

compiler/psystem.pas

@@ -425,13 +425,13 @@ implementation
         wordfarpointertype:=tcpupointerdefclass(cpointerdef).createx86(u16inttype,x86pt_far);
         longintfarpointertype:=tcpupointerdefclass(cpointerdef).createx86(s32inttype,x86pt_far);
   {$endif i8086}
-        x86_m64type:=carraydef.create(0,1,s32inttype);
-        x86_m128type:=carraydef.create(0,3,s32inttype);
-        x86_m128dtype:=carraydef.create(0,1,s32inttype);
-        x86_m128itype:=carraydef.create(0,3,s32inttype);
-        x86_m256type:=carraydef.create(0,7,s32inttype);
-        x86_m256dtype:=carraydef.create(0,3,s32inttype);
-        x86_m256itype:=carraydef.create(0,7,s32inttype);
+        x86_m64type:=carraydef.create_vector(0,1,s32inttype);
+        x86_m128type:=carraydef.create_vector(0,3,s32inttype);
+        x86_m128dtype:=carraydef.create_vector(0,1,s32inttype);
+        x86_m128itype:=carraydef.create_vector(0,3,s32inttype);
+        x86_m256type:=carraydef.create_vector(0,7,s32inttype);
+        x86_m256dtype:=carraydef.create_vector(0,3,s32inttype);
+        x86_m256itype:=carraydef.create_vector(0,7,s32inttype);
 
         tarraydef(x86_m64type).elementdef:=s32floattype;
         tarraydef(x86_m128type).elementdef:=s32floattype;

compiler/symdef.pas

@@ -9563,7 +9563,41 @@ implementation
 {$ifdef x86}
 {$define use_vectorfpuimplemented}
         use_vectorfpu:=(is_single(def) and (current_settings.fputype in sse_singlescalar)) or
-          (is_double(def) and (current_settings.fputype in sse_doublescalar));
+          (is_double(def) and (current_settings.fputype in sse_doublescalar)) or
+          { Check vector types }
+          (
+            is_normal_array(def) and
+            (ado_IsVector in tarraydef(def).arrayoptions) and
+            (
+              (
+                is_single(tarraydef(def).elementdef) and
+                (
+                  { SSE or AVX XMM register }
+                  ((tarraydef(def).elecount = 4) and (current_settings.fputype in sse_singlescalar)) or
+                  { AVX YMM register }
+                  ((tarraydef(def).elecount = 8) and (current_settings.fputype in fpu_avx_instructionsets))
+{$ifndef i8086}
+                  or
+                  { AVX512 ZMM register }
+                  ((tarraydef(def).elecount = 16) and (current_settings.fputype in [fpu_avx512f]))
+{$endif not i8086}
+                )
+              ) or
+              (
+                is_double(tarraydef(def).elementdef) and
+                (
+                  { SSE or AVX XMM register }
+                  ((tarraydef(def).elecount = 2) and (current_settings.fputype in sse_doublescalar)) or
+                  { AVX YMM register }
+                  ((tarraydef(def).elecount = 4) and (current_settings.fputype in fpu_avx_instructionsets))
+{$ifndef i8086}
+                  { AVX512 ZMM register }
+                  or ((tarraydef(def).elecount = 8) and (current_settings.fputype in [fpu_avx512f]))
+{$endif not i8086}
+                )
+              )
+            )
+          );
 {$endif x86}
 {$ifdef arm}
 {$define use_vectorfpuimplemented}