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* x86: Added SARX to BMI2 code generator

J. Gareth "Curious Kit" Moreton 2 years ago
parent
commit
6cbb3d982d
1 changed files with 9 additions and 5 deletions
  1. 9 5
      compiler/x86/cgx86.pas

+ 9 - 5
compiler/x86/cgx86.pas

@@ -2077,7 +2077,7 @@ unit cgx86;
             href.index:=src2;
             list.concat(taicpu.op_ref_reg(A_LEA,TCgSize2OpSize[size],href,dst));
           end
-        else if (op in [OP_SHR,OP_SHL]) and
+        else if (op in [OP_SAR,OP_SHR,OP_SHL]) and
           (CPUX86_HAS_BMI2 in cpu_capabilities[current_settings.cputype]) and
           (size in [OS_32,OS_S32
 {$ifdef x86_64}
@@ -2085,10 +2085,14 @@ unit cgx86;
 {$endif x86_64}
           ]) then
           begin
-            if op=OP_SHL then
-              list.concat(taicpu.op_reg_reg_reg(A_SHLX,TCgSize2OpSize[size],src1,src2,dst))
-            else
-              list.concat(taicpu.op_reg_reg_reg(A_SHRX,TCgSize2OpSize[size],src1,src2,dst));
+            case op of
+              OP_SAR:
+                list.concat(taicpu.op_reg_reg_reg(A_SARX,TCgSize2OpSize[size],src1,src2,dst));
+              OP_SHL:
+                list.concat(taicpu.op_reg_reg_reg(A_SHLX,TCgSize2OpSize[size],src1,src2,dst));
+              else
+                list.concat(taicpu.op_reg_reg_reg(A_SHRX,TCgSize2OpSize[size],src1,src2,dst));
+            end;
           end
         else
           inherited a_op_reg_reg_reg(list,op,size,src1,src2,dst);