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@@ -295,6 +295,8 @@ Implementation
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function TARMAsmOptimizer.RedundantMovProcess(var p: tai;hp1: tai):boolean;
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var
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I: Integer;
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+ current_hp: tai;
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+ LDRChange: Boolean;
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begin
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Result:=false;
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{
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@@ -310,58 +312,269 @@ Implementation
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}
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if (taicpu(p).ops = 2) and
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(taicpu(p).oper[1]^.typ = top_reg) and
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- (taicpu(p).oppostfix = PF_NONE) and
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+ (taicpu(p).oppostfix = PF_NONE) then
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+ begin
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- MatchInstruction(hp1, [A_ADD, A_ADC,
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+ if
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+ MatchInstruction(hp1, [A_ADD, A_ADC,
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{$ifdef ARM}
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- A_RSB, A_RSC,
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+ A_RSB, A_RSC,
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{$endif ARM}
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- A_SUB, A_SBC,
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- A_AND, A_BIC, A_EOR, A_ORR, A_MOV, A_MVN],
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- [taicpu(p).condition], []) and
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- { MOV and MVN might only have 2 ops }
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- (taicpu(hp1).ops >= 2) and
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- MatchOperand(taicpu(p).oper[0]^, taicpu(hp1).oper[0]^.reg) and
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- (taicpu(hp1).oper[1]^.typ = top_reg) and
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- (
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- (taicpu(hp1).ops = 2) or
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- (taicpu(hp1).oper[2]^.typ in [top_reg, top_const, top_shifterop])
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- ) and
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+ A_SUB, A_SBC,
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+ A_AND, A_BIC, A_EOR, A_ORR, A_MOV, A_MVN],
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+ [taicpu(p).condition], []) and
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+ { MOV and MVN might only have 2 ops }
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+ (taicpu(hp1).ops >= 2) and
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+ MatchOperand(taicpu(p).oper[0]^, taicpu(hp1).oper[0]^.reg) and
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+ (taicpu(hp1).oper[1]^.typ = top_reg) and
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+ (
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+ (taicpu(hp1).ops = 2) or
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+ (taicpu(hp1).oper[2]^.typ in [top_reg, top_const, top_shifterop])
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+ ) and
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{$ifdef AARCH64}
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- (taicpu(p).oper[1]^.reg<>NR_SP) and
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+ (taicpu(p).oper[1]^.reg<>NR_SP) and
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{$endif AARCH64}
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- not(RegUsedBetween(taicpu(p).oper[1]^.reg,p,hp1)) then
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- begin
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- { When we get here we still don't know if the registers match }
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- for I:=1 to 2 do
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- {
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- If the first loop was successful p will be replaced with hp1.
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- The checks will still be ok, because all required information
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- will also be in hp1 then.
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- }
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- if (taicpu(hp1).ops > I) and
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- MatchOperand(taicpu(p).oper[0]^, taicpu(hp1).oper[I]^.reg)
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+ not(RegUsedBetween(taicpu(p).oper[1]^.reg,p,hp1)) then
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+ begin
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+ { When we get here we still don't know if the registers match }
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+ for I:=1 to 2 do
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+ {
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+ If the first loop was successful p will be replaced with hp1.
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+ The checks will still be ok, because all required information
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+ will also be in hp1 then.
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+ }
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+ if (taicpu(hp1).ops > I) and
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+ MatchOperand(taicpu(p).oper[0]^, taicpu(hp1).oper[I]^.reg)
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+{$ifdef ARM}
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+ { prevent certain combinations on thumb(2), this is only a safe approximation }
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+ and (not(GenerateThumbCode or GenerateThumb2Code) or
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+ ((getsupreg(taicpu(p).oper[1]^.reg)<>RS_R13) and
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+ (getsupreg(taicpu(p).oper[1]^.reg)<>RS_R15)))
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+{$endif ARM}
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+
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+ then
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+ begin
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+ DebugMsg('Peephole RedundantMovProcess done', hp1);
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+ taicpu(hp1).oper[I]^.reg := taicpu(p).oper[1]^.reg;
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+ if p<>hp1 then
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+ begin
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+ asml.remove(p);
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+ p.free;
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+ p:=hp1;
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+ Result:=true;
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+ end;
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+ end;
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+
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+ if Result then Exit;
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+ end
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+ { Change: Change:
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+ mov r1, r0 mov r1, r0
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+ ... ...
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+ ldr/str r2, [r1, etc.] mov r2, r1
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+ To: To:
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+ ldr/str r2, [r0, etc.] mov r2, r0
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+ }
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+ else if (taicpu(p).condition = C_None) and (taicpu(p).oper[1]^.typ = top_reg)
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{$ifdef ARM}
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- { prevent certain combinations on thumb(2), this is only a safe approximation }
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- and (not(GenerateThumbCode or GenerateThumb2Code) or
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- ((getsupreg(taicpu(p).oper[1]^.reg)<>RS_R13) and
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- (getsupreg(taicpu(p).oper[1]^.reg)<>RS_R15)))
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+ and not (getsupreg(taicpu(p).oper[0]^.reg) in [RS_PC, RS_R14, RS_STACK_POINTER_REG])
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+ and (getsupreg(taicpu(p).oper[1]^.reg) <> RS_PC)
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{$endif ARM}
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+{$ifdef AARCH64}
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+ and (getsupreg(taicpu(p).oper[0]^.reg) <> RS_STACK_POINTER_REG)
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+{$endif AARCH64}
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+ then
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+ begin
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+ current_hp := p;
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+ TransferUsedRegs(TmpUsedRegs);
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- then
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- begin
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- DebugMsg('Peephole RedundantMovProcess done', hp1);
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- taicpu(hp1).oper[I]^.reg := taicpu(p).oper[1]^.reg;
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- if p<>hp1 then
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+ { Search local instruction block }
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+ while GetNextInstruction(current_hp, hp1) and (hp1 <> BlockEnd) and (hp1.typ = ait_instruction) do
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begin
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- asml.remove(p);
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- p.free;
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- p:=hp1;
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- Result:=true;
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+ UpdateUsedRegs(TmpUsedRegs, tai(current_hp.Next));
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+ LDRChange := False;
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+
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+ if (taicpu(hp1).opcode in [A_LDR,A_STR]) and (taicpu(hp1).ops = 2) then
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+ begin
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+
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+ { Change the registers from r1 to r0 }
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+ if (taicpu(hp1).oper[1]^.ref^.base = taicpu(p).oper[0]^.reg) and
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+{$ifdef ARM}
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+ { This optimisation conflicts with something and raises
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+ an access violation - needs further investigation. [Kit] }
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+ (taicpu(hp1).opcode <> A_LDR) and
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+{$endif ARM}
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+ { Don't mess around with the base register if the
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+ reference is pre- or post-indexed }
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+ (taicpu(hp1).oper[1]^.ref^.addressmode = AM_OFFSET) then
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+ begin
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+ taicpu(hp1).oper[1]^.ref^.base := taicpu(p).oper[1]^.reg;
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+ LDRChange := True;
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+ end;
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+
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+ if taicpu(hp1).oper[1]^.ref^.index = taicpu(p).oper[0]^.reg then
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+ begin
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+ taicpu(hp1).oper[1]^.ref^.index := taicpu(p).oper[1]^.reg;
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+ LDRChange := True;
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+ end;
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+
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+ if LDRChange then
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+ DebugMsg('Peephole Optimization: ' + std_regname(taicpu(p).oper[0]^.reg) + ' = ' + std_regname(taicpu(p).oper[1]^.reg) + ' (MovLdr2Ldr 1)', hp1);
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+
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+ { Drop out if we're dealing with pre-indexed references }
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+ if (taicpu(hp1).oper[1]^.ref^.addressmode = AM_PREINDEXED) and
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+ (
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+ RegInRef(taicpu(p).oper[0]^.reg, taicpu(hp1).oper[1]^.ref^) or
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+ RegInRef(taicpu(p).oper[1]^.reg, taicpu(hp1).oper[1]^.ref^)
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+ ) then
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+ begin
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+ { Remember to update register allocations }
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+ if LDRChange then
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+ AllocRegBetween(taicpu(p).oper[1]^.reg, p, hp1, UsedRegs);
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+
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+ Break;
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+ end;
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+
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+ { The register being stored can be potentially changed (as long as it's not the stack pointer) }
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+ if (taicpu(hp1).opcode = A_STR) and (getsupreg(taicpu(p).oper[1]^.reg) <> RS_STACK_POINTER_REG) and
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+ MatchOperand(taicpu(hp1).oper[0]^, taicpu(p).oper[0]^.reg) then
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+ begin
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+ DebugMsg('Peephole Optimization: ' + std_regname(taicpu(p).oper[0]^.reg) + ' = ' + std_regname(taicpu(p).oper[1]^.reg) + ' (MovLdr2Ldr 2)', hp1);
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+ taicpu(hp1).oper[0]^.reg := taicpu(p).oper[1]^.reg;
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+ LDRChange := True;
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+ end;
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+
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+ if LDRChange and (getsupreg(taicpu(p).oper[1]^.reg) <> RS_STACK_POINTER_REG) then
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+ begin
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+ AllocRegBetween(taicpu(p).oper[1]^.reg, p, hp1, UsedRegs);
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+ if (taicpu(p).oppostfix = PF_None) and
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+ (
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+ (
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+ (taicpu(hp1).opcode = A_LDR) and
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+ MatchOperand(taicpu(hp1).oper[0]^, taicpu(p).oper[0]^.reg)
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+ ) or
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+ not RegUsedAfterInstruction(taicpu(p).oper[0]^.reg, hp1, TmpUsedRegs)
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+ ) and
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+ { Double-check to see if the old registers were actually
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+ changed (e.g. if the super registers matched, but not
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+ the sizes, they won't be changed). }
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+ (
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+ (taicpu(hp1).opcode = A_LDR) or
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+ not RegInOp(taicpu(p).oper[0]^.reg, taicpu(hp1).oper[0]^)
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+ ) and
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+ not RegInRef(taicpu(p).oper[0]^.reg, taicpu(hp1).oper[1]^.ref^) then
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+ begin
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+ DebugMsg('Peephole Optimization: RedundantMovProcess 2a done', p);
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+ RemoveCurrentP(p);
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+ Result := True;
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+ Exit;
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+ end;
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+ end;
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+ end
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+ else if (taicpu(hp1).opcode = A_MOV) and (taicpu(hp1).oppostfix = PF_None) and
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+ (taicpu(hp1).ops = 2) then
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+ begin
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+ if MatchOperand(taicpu(hp1).oper[0]^, taicpu(p).oper[0]^.reg) then
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+ begin
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+ { Found another mov that writes entirely to the register }
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+ if RegUsedBetween(taicpu(p).oper[0]^.reg, p, hp1) then
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+ begin
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+ { Register was used beforehand }
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+ if MatchOperand(taicpu(hp1).oper[1]^, taicpu(p).oper[1]^.reg) then
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+ begin
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+ { This MOV is exactly the same as the first one.
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+ Since none of the registers have changed value
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+ at this point, we can remove it. }
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+ DebugMsg('Peephole Optimization: RedundantMovProcess 3a done', hp1);
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+ asml.Remove(hp1);
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+ hp1.Free;
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+
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+ { We still have the original p, so we can continue optimising;
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+ if it was -O2 or below, this instruction appeared immediately
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+ after the first MOV, so we're technically not looking more
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+ than one instruction ahead after it's removed! [Kit] }
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+ Continue;
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+ end
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+ else
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+ { Register changes value - drop out }
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+ Break;
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+ end;
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+
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+ { We can delete the first MOV (only if the second MOV is unconditional) }
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+{$ifdef ARM}
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+ if (taicpu(p).oppostfix = PF_None) and
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+ (taicpu(hp1).condition = C_None) then
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+{$endif ARM}
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+ begin
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+ DebugMsg('Peephole Optimization: RedundantMovProcess 2b done', p);
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+ RemoveCurrentP(p);
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+ Result := True;
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+ end;
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+ Exit;
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+ end
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+ else if MatchOperand(taicpu(hp1).oper[1]^, taicpu(p).oper[0]^.reg) then
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+ begin
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+ if MatchOperand(taicpu(hp1).oper[0]^, taicpu(p).oper[1]^.reg)
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+ { Be careful - if the entire register is not used, removing this
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+ instruction will leave the unused part uninitialised }
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+{$ifdef AARCH64}
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+ and (getsubreg(taicpu(p).oper[1]^.reg) = R_SUBQ)
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+{$endif AARCH64}
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+ then
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+ begin
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+ { Instruction will become mov r1,r1 }
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+ DebugMsg('Peephole Optimization: Mov2None 2 done', hp1);
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+ asml.Remove(hp1);
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+ hp1.Free;
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+ Continue;
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+ end;
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+
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+ { Change the old register (checking the first operand again
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+ forces it to be left alone if the full register is not
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+ used, lest mov w1,w1 gets optimised out by mistake. [Kit] }
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+{$ifdef AARCH64}
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+ if not MatchOperand(taicpu(hp1).oper[0]^, taicpu(p).oper[1]^.reg) then
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+{$endif AARCH64}
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+ begin
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+ DebugMsg('Peephole Optimization: ' + std_regname(taicpu(p).oper[0]^.reg) + ' = ' + std_regname(taicpu(p).oper[1]^.reg) + ' (MovMov2Mov 2)', hp1);
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+ taicpu(hp1).oper[1]^.reg := taicpu(p).oper[1]^.reg;
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+ AllocRegBetween(taicpu(p).oper[1]^.reg, p, hp1, UsedRegs);
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+
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+ { If this was the only reference to the old register,
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+ then we can remove the original MOV now }
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+
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+ if (taicpu(p).oppostfix = PF_None) and
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+ { A bit of a hack - sometimes registers aren't tracked properly, so do not
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+ remove if the register was apparently not allocated when its value is
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+ first set at the MOV command (this is especially true for the stack
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+ register). [Kit] }
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+ (getsupreg(taicpu(p).oper[1]^.reg) <> RS_STACK_POINTER_REG) and
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+ RegInUsedRegs(taicpu(p).oper[0]^.reg, UsedRegs) and
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+ not RegUsedAfterInstruction(taicpu(p).oper[0]^.reg, hp1, TmpUsedRegs) then
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+ begin
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+ DebugMsg('Peephole Optimization: RedundantMovProcess 2c done', p);
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+ RemoveCurrentP(p);
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+ Result := True;
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+ Exit;
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+ end;
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+ end;
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+ end;
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+ end;
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+
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+ { On low optimisation settions, don't search more than one instruction ahead }
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+ if not(cs_opt_level3 in current_settings.optimizerswitches) or
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+ { Stop at procedure calls and jumps }
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+ is_calljmp(taicpu(hp1).opcode) or
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+ { If the read register has changed value, or the MOV
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+ destination register has been used, drop out }
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+ RegInInstruction(taicpu(p).oper[0]^.reg, hp1) or
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+ RegModifiedByInstruction(taicpu(p).oper[1]^.reg, hp1) then
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+ Break;
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+
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+ current_hp := hp1;
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end;
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- end;
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+ end;
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end;
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- end;
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+ end;
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function TARMAsmOptimizer.OptPass1UXTB(var p : tai) : Boolean;
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florian