Browse Source

+ tzcnt assembler instruction

git-svn-id: trunk@26506 -
florian 11 years ago
parent
commit
7028210817

+ 1 - 0
compiler/i386/i386att.inc

@@ -946,6 +946,7 @@
 'vzeroupper',
 'vzeroupper',
 'andn',
 'andn',
 'bextr',
 'bextr',
+'tzcnt',
 'rorx',
 'rorx',
 'sarx',
 'sarx',
 'shlx',
 'shlx',

+ 1 - 0
compiler/i386/i386atts.inc

@@ -963,5 +963,6 @@ attsufNONE,
 attsufNONE,
 attsufNONE,
 attsufNONE,
 attsufNONE,
 attsufNONE,
 attsufNONE,
+attsufNONE,
 attsufNONE
 attsufNONE
 );
 );

+ 1 - 0
compiler/i386/i386int.inc

@@ -946,6 +946,7 @@
 'vzeroupper',
 'vzeroupper',
 'andn',
 'andn',
 'bextr',
 'bextr',
+'tzcnt',
 'rorx',
 'rorx',
 'sarx',
 'sarx',
 'shlx',
 'shlx',

+ 1 - 1
compiler/i386/i386nop.inc

@@ -1,2 +1,2 @@
 { don't edit, this file is generated from x86ins.dat }
 { don't edit, this file is generated from x86ins.dat }
-1657;
+1658;

+ 1 - 0
compiler/i386/i386op.inc

@@ -946,6 +946,7 @@ A_VZEROALL,
 A_VZEROUPPER,
 A_VZEROUPPER,
 A_ANDN,
 A_ANDN,
 A_BEXTR,
 A_BEXTR,
+A_TZCNT,
 A_RORX,
 A_RORX,
 A_SARX,
 A_SARX,
 A_SHLX,
 A_SHLX,

+ 1 - 0
compiler/i386/i386prop.inc

@@ -946,6 +946,7 @@
 (Ch: (Ch_All, Ch_None, Ch_None)),
 (Ch: (Ch_All, Ch_None, Ch_None)),
 (Ch: (Ch_Wop1, Ch_Rop2, Ch_Rop3)),
 (Ch: (Ch_Wop1, Ch_Rop2, Ch_Rop3)),
 (Ch: (Ch_Wop1, Ch_Rop2, Ch_Rop3)),
 (Ch: (Ch_Wop1, Ch_Rop2, Ch_Rop3)),
+(Ch: (Ch_Wop2, Ch_WFlags, Ch_Rop1)),
 (Ch: (Ch_Wop1, Ch_Rop2, Ch_None)),
 (Ch: (Ch_Wop1, Ch_Rop2, Ch_None)),
 (Ch: (Ch_Wop1, Ch_Rop2, Ch_Rop3)),
 (Ch: (Ch_Wop1, Ch_Rop2, Ch_Rop3)),
 (Ch: (Ch_Wop1, Ch_Rop2, Ch_Rop3)),
 (Ch: (Ch_Wop1, Ch_Rop2, Ch_Rop3)),

+ 7 - 0
compiler/i386/i386tab.inc

@@ -11571,6 +11571,13 @@
     code    : #242#249#1#247#62#72;
     code    : #242#249#1#247#62#72;
     flags   : if_bmi1
     flags   : if_bmi1
   ),
   ),
+  (
+    opcode  : A_TZCNT;
+    ops     : 2;
+    optypes : (ot_reg16 or ot_bits32 or ot_bits64,ot_rm_gpr,ot_none,ot_none);
+    code    : #208#219#2#15#188#72;
+    flags   : if_bmi1 or if_sm
+  ),
   (
   (
     opcode  : A_RORX;
     opcode  : A_RORX;
     ops     : 3;
     ops     : 3;

+ 1 - 0
compiler/i8086/i8086att.inc

@@ -946,6 +946,7 @@
 'vzeroupper',
 'vzeroupper',
 'andn',
 'andn',
 'bextr',
 'bextr',
+'tzcnt',
 'rorx',
 'rorx',
 'sarx',
 'sarx',
 'shlx',
 'shlx',

+ 1 - 0
compiler/i8086/i8086atts.inc

@@ -963,5 +963,6 @@ attsufNONE,
 attsufNONE,
 attsufNONE,
 attsufNONE,
 attsufNONE,
 attsufNONE,
 attsufNONE,
+attsufNONE,
 attsufNONE
 attsufNONE
 );
 );

+ 1 - 0
compiler/i8086/i8086int.inc

@@ -946,6 +946,7 @@
 'vzeroupper',
 'vzeroupper',
 'andn',
 'andn',
 'bextr',
 'bextr',
+'tzcnt',
 'rorx',
 'rorx',
 'sarx',
 'sarx',
 'shlx',
 'shlx',

+ 1 - 1
compiler/i8086/i8086nop.inc

@@ -1,2 +1,2 @@
 { don't edit, this file is generated from x86ins.dat }
 { don't edit, this file is generated from x86ins.dat }
-1685;
+1686;

+ 1 - 0
compiler/i8086/i8086op.inc

@@ -946,6 +946,7 @@ A_VZEROALL,
 A_VZEROUPPER,
 A_VZEROUPPER,
 A_ANDN,
 A_ANDN,
 A_BEXTR,
 A_BEXTR,
+A_TZCNT,
 A_RORX,
 A_RORX,
 A_SARX,
 A_SARX,
 A_SHLX,
 A_SHLX,

+ 1 - 0
compiler/i8086/i8086prop.inc

@@ -946,6 +946,7 @@
 (Ch: (Ch_All, Ch_None, Ch_None)),
 (Ch: (Ch_All, Ch_None, Ch_None)),
 (Ch: (Ch_Wop1, Ch_Rop2, Ch_Rop3)),
 (Ch: (Ch_Wop1, Ch_Rop2, Ch_Rop3)),
 (Ch: (Ch_Wop1, Ch_Rop2, Ch_Rop3)),
 (Ch: (Ch_Wop1, Ch_Rop2, Ch_Rop3)),
+(Ch: (Ch_Wop2, Ch_WFlags, Ch_Rop1)),
 (Ch: (Ch_Wop1, Ch_Rop2, Ch_None)),
 (Ch: (Ch_Wop1, Ch_Rop2, Ch_None)),
 (Ch: (Ch_Wop1, Ch_Rop2, Ch_Rop3)),
 (Ch: (Ch_Wop1, Ch_Rop2, Ch_Rop3)),
 (Ch: (Ch_Wop1, Ch_Rop2, Ch_Rop3)),
 (Ch: (Ch_Wop1, Ch_Rop2, Ch_Rop3)),

+ 7 - 0
compiler/i8086/i8086tab.inc

@@ -11571,6 +11571,13 @@
     code    : #242#249#1#247#62#72;
     code    : #242#249#1#247#62#72;
     flags   : if_bmi1
     flags   : if_bmi1
   ),
   ),
+  (
+    opcode  : A_TZCNT;
+    ops     : 2;
+    optypes : (ot_reg16 or ot_bits32 or ot_bits64,ot_rm_gpr,ot_none,ot_none);
+    code    : #208#219#2#15#188#72;
+    flags   : if_bmi1 or if_sm
+  ),
   (
   (
     opcode  : A_RORX;
     opcode  : A_RORX;
     ops     : 3;
     ops     : 3;

+ 4 - 0
compiler/x86/x86ins.dat

@@ -4687,6 +4687,10 @@ reg64,reg64,rm64                      \362\363\371\1\xf2\75\120           BMI1,X
 reg32,rm32,reg32                      \362\371\1\xf7\76\110               BMI1
 reg32,rm32,reg32                      \362\371\1\xf7\76\110               BMI1
 reg64,rm64,reg64                      \362\363\371\1\xf7\76\110           BMI1,X86_64
 reg64,rm64,reg64                      \362\363\371\1\xf7\76\110           BMI1,X86_64
 
 
+[TZCNT]
+(Ch_Wop2, Ch_WFlags, Ch_Rop1)
+reg16|32|64,regmem                    \320\333\2\x0F\xBC\110              BMI1,SM
+
 ;*******************************************************************************
 ;*******************************************************************************
 ;********** BMI2 ***************************************************************
 ;********** BMI2 ***************************************************************
 ;*******************************************************************************
 ;*******************************************************************************

+ 1 - 0
compiler/x86_64/x8664ats.inc

@@ -963,5 +963,6 @@ attsufNONE,
 attsufNONE,
 attsufNONE,
 attsufNONE,
 attsufNONE,
 attsufNONE,
 attsufNONE,
+attsufNONE,
 attsufNONE
 attsufNONE
 );
 );

+ 1 - 0
compiler/x86_64/x8664att.inc

@@ -946,6 +946,7 @@
 'vzeroupper',
 'vzeroupper',
 'andn',
 'andn',
 'bextr',
 'bextr',
+'tzcnt',
 'rorx',
 'rorx',
 'sarx',
 'sarx',
 'shlx',
 'shlx',

+ 1 - 0
compiler/x86_64/x8664int.inc

@@ -946,6 +946,7 @@
 'vzeroupper',
 'vzeroupper',
 'andn',
 'andn',
 'bextr',
 'bextr',
+'tzcnt',
 'rorx',
 'rorx',
 'sarx',
 'sarx',
 'shlx',
 'shlx',

+ 1 - 1
compiler/x86_64/x8664nop.inc

@@ -1,2 +1,2 @@
 { don't edit, this file is generated from x86ins.dat }
 { don't edit, this file is generated from x86ins.dat }
-1678;
+1679;

+ 1 - 0
compiler/x86_64/x8664op.inc

@@ -946,6 +946,7 @@ A_VZEROALL,
 A_VZEROUPPER,
 A_VZEROUPPER,
 A_ANDN,
 A_ANDN,
 A_BEXTR,
 A_BEXTR,
+A_TZCNT,
 A_RORX,
 A_RORX,
 A_SARX,
 A_SARX,
 A_SHLX,
 A_SHLX,

+ 1 - 0
compiler/x86_64/x8664pro.inc

@@ -946,6 +946,7 @@
 (Ch: (Ch_All, Ch_None, Ch_None)),
 (Ch: (Ch_All, Ch_None, Ch_None)),
 (Ch: (Ch_Wop1, Ch_Rop2, Ch_Rop3)),
 (Ch: (Ch_Wop1, Ch_Rop2, Ch_Rop3)),
 (Ch: (Ch_Wop1, Ch_Rop2, Ch_Rop3)),
 (Ch: (Ch_Wop1, Ch_Rop2, Ch_Rop3)),
+(Ch: (Ch_Wop2, Ch_WFlags, Ch_Rop1)),
 (Ch: (Ch_Wop1, Ch_Rop2, Ch_None)),
 (Ch: (Ch_Wop1, Ch_Rop2, Ch_None)),
 (Ch: (Ch_Wop1, Ch_Rop2, Ch_Rop3)),
 (Ch: (Ch_Wop1, Ch_Rop2, Ch_Rop3)),
 (Ch: (Ch_Wop1, Ch_Rop2, Ch_Rop3)),
 (Ch: (Ch_Wop1, Ch_Rop2, Ch_Rop3)),

+ 7 - 0
compiler/x86_64/x8664tab.inc

@@ -11690,6 +11690,13 @@
     code    : #242#243#249#1#247#62#72;
     code    : #242#243#249#1#247#62#72;
     flags   : if_bmi1 or if_x86_64
     flags   : if_bmi1 or if_x86_64
   ),
   ),
+  (
+    opcode  : A_TZCNT;
+    ops     : 2;
+    optypes : (ot_reg16 or ot_bits32 or ot_bits64,ot_rm_gpr,ot_none,ot_none);
+    code    : #208#219#2#15#188#72;
+    flags   : if_bmi1 or if_sm
+  ),
   (
   (
     opcode  : A_RORX;
     opcode  : A_RORX;
     ops     : 3;
     ops     : 3;