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* some iA-64 updates

git-svn-id: trunk@4428 -
florian 19 роки тому
батько
коміт
715b020ba3
4 змінених файлів з 89 додано та 210 видалено
  1. 1 1
      .gitattributes
  2. 14 23
      compiler/ia64/aasmcpu.pas
  3. 30 163
      compiler/ia64/cpubase.pas
  4. 44 23
      compiler/ia64/cpuinfo.pas

+ 1 - 1
.gitattributes

@@ -156,7 +156,7 @@ compiler/i386/ra386att.pas svneol=native#text/plain
 compiler/i386/ra386int.pas svneol=native#text/plain
 compiler/i386/rgcpu.pas svneol=native#text/plain
 compiler/i386/rropt386.pas svneol=native#text/plain
-compiler/ia64/cpuasm.pas svneol=native#text/plain
+compiler/ia64/aasmcpu.pas svneol=native#text/plain
 compiler/ia64/cpubase.pas svneol=native#text/plain
 compiler/ia64/cpuinfo.pas svneol=native#text/plain
 compiler/impdef.pas svneol=native#text/plain

+ 14 - 23
compiler/ia64/cpuasm.pas → compiler/ia64/aasmcpu.pas

@@ -1,5 +1,5 @@
 {
-    Copyright (c) 2000 by Florian Klaempfl
+    Copyright (c) 2000-2006 by Florian Klaempfl
 
     Contains the assembler object for the ia64
 
@@ -19,16 +19,17 @@
 
  ****************************************************************************
 }
-unit cpuasm;
+unit aasmcpu;
 
 {$i fpcdefs.inc}
 
 interface
 
 uses
-  cobjects,
-  aasm,globals,verbose,
-  cpubase;
+  globals,verbose,
+  aasmbase,aasmtai,
+  cpubase,
+  cgutils;
 
 
 type
@@ -43,16 +44,6 @@ type
   { Types of operand }
   toptype=(top_none,top_reg,top_ref,top_const,top_symbol,top_qp);
 
-  toper=record
-    case typ : toptype of
-       top_none   : ();
-       top_reg    : (reg:tregister);
-       top_qp     : (qp : tqp);
-       top_ref    : (ref:preference);
-       top_const  : (val:int64);
-       top_symbol : (sym:pasmsymbol;symofs:longint);
-  end;
-
   paicpu = ^taicpu;
   taicpu = class(tai)
      is_jmp    : boolean; { is this instruction a jump? (needed for optimizer) }
@@ -109,7 +100,7 @@ type
      { M6: floating-point load }
      { M9: floating-point store }
      constructor op_reg_ref(_qp : tqp;op : tasmop;postfix : tldsttype;
-       _hint : thint;const r1 : tregister;ref : preference);
+       _hint : thint;const r1 : tregister;ref : treference);
 
      { M2: integer load incremented by register }
      { M7: floating-point load incremented by register }
@@ -122,15 +113,15 @@ type
      { M8: floating-point load increment by imm. }
      { M10: floating-point store increment by imm. }
      constructor op_reg_ref_const(_qp : tqp;op : tasmop;postfix : tldsttype;
-       _hint : thint;const r1 : tregister;ref : preference;i : longint);
+       _hint : thint;const r1 : tregister;ref : treference;i : longint);
 
      { M11: floating-point load pair}
      constructor op_reg_ref(_qp : tqp;op : tasmop;postfix : tldsttype;
-       _hint : thint;const r1,r2 : tregister;ref : preference);
+       _hint : thint;const r1,r2 : tregister;ref : treference);
 
      { M12: floating-point load pair increment by imm. }
      constructor op_reg_ref(_qp : tqp;op : tasmop;postfix : tldsttype;
-       _hint : thint;const r1,r2 : tregister;ref : preference;i : longint);
+       _hint : thint;const r1,r2 : tregister;ref : treference;i : longint);
 
      { X1: break/nop }
      constructor op_const62(_qp : tqp;op : tasmop;i : int64);
@@ -242,7 +233,7 @@ implementation
     { M6: floating-point load }
     { M9: floating-point store }
     constructor taicpu.op_reg_ref(_qp : tqp;op : tasmop;postfix : tldsttype;
-      _hint : thint;const r1 : tregister;ref : preference);
+      _hint : thint;const r1 : tregister;ref : treference);
 
       begin
       end;
@@ -261,21 +252,21 @@ implementation
     { M8: floating-point load increment by imm. }
     { M10: floating-point store increment by imm. }
     constructor taicpu.op_reg_ref_const(_qp : tqp;op : tasmop;postfix : tldsttype;
-      _hint : thint;const r1 : tregister;ref : preference;i : longint);
+      _hint : thint;const r1 : tregister;ref : treference;i : longint);
 
       begin
       end;
 
     { M11: floating-point load pair}
     constructor taicpu.op_reg_ref(_qp : tqp;op : tasmop;postfix : tldsttype;
-      _hint : thint;const r1,r2 : tregister;ref : preference);
+      _hint : thint;const r1,r2 : tregister;ref : treference);
 
       begin
       end;
 
     { M12: floating-point load pair increment by imm. }
     constructor taicpu.op_reg_ref(_qp : tqp;op : tasmop;postfix : tldsttype;
-      _hint : thint;const r1,r2 : tregister;ref : preference;i : longint);
+      _hint : thint;const r1,r2 : tregister;ref : treference;i : longint);
 
       begin
       end;

+ 30 - 163
compiler/ia64/cpubase.pas

@@ -1,7 +1,7 @@
 {
-    Copyright (C) 2000 by Florian Klaempfl
+    Copyright (C) 2000-2006 by Florian Klaempfl
 
-    this unit implements an asmlistitem class for the iA-64 architecture
+    this unit implements the base types for the iA-64 architecture
 
     This program is free software; you can redistribute it and/or modify
     it under the terms of the GNU General Public License as published by
@@ -24,7 +24,11 @@ unit cpubase;
   interface
 
     uses
-       cutils,strings,systems,cobjects,globals,aasm,cpuinfo;
+       cutils,
+       globals,
+       systems,
+       cpuinfo,
+       cgbase;
 
 type
   tasmop = (A_ADD,A_SUB,A_ADDP4,A_AND,A_ANDCM,A_OR,A_XOR,A_SHLADD,
@@ -62,6 +66,14 @@ type
                LST_FILL,LST_C_NC,LST_C_CLR_ACQ,LST_REL,
                LST_SPILL);
 
+{*****************************************************************************
+                                   Flags
+*****************************************************************************}
+
+    type
+      TResFlags = (F_NONE,F_LT,F_LTU,F_EQ,F_LT_UNC,F_LTU_UNC,F_EQ_UNC,
+              F_EQ_AND,F_EQ_OR,F_EQ_OR_ANDCM,F_NE_AND,F_NE_OR);
+
 Type
  TRegister = (R_NO,  { R_NO is Mandatory, signifies no register }
               R_0,R_1,R_2,R_3,R_4,R_5,R_6,R_7,R_8,R_9,
@@ -84,58 +96,29 @@ const
 { Constants describing the registers }
 
 Const
-  Firstreg = R_0;
-  LastReg = R_F31;
-
-  stack_pointer_reg = R_30;
-  frame_pointer_reg = R_15;
-  self_pointer_reg  = R_16;
-  accumulator   = R_0;
-  {the return_result_reg, is used inside the called function to store its return
-  value when that is a scalar value otherwise a pointer to the address of the
-  result is placed inside it}
-        return_result_reg               =       accumulator;
-
-  {the function_result_reg contains the function result after a call to a scalar
-  function othewise it contains a pointer to the returned result}
-        function_result_reg     =       accumulator;
-  global_pointer = R_29;
-  return_pointer = R_26;
-
-  max_scratch_regs = 2;
-  scratch_regs : array[1..max_scratch_regs] of tregister = (R_1,R_2);
-
-{ low and high of the available maximum width integer general purpose }
-{ registers                                                           }
-  LoGPReg = R_0;
-  HiGPReg = R_31;
-
-  { sizes }
-  sizeof(aint)  = 8;
-  extended_size = 16;
-
-  general_registers = [R_0..R_31];
-
   intregs = [R_0..R_31];
   fpuregs = [R_F0..R_F31];
   mmregs = [];
 
-  availabletempregsint = [R_0..R_14,R_16..R_25,R_28];
-  availabletempregsfpu = [R_F0..R_F30];
-  availabletempregsmm  = [];
-
-  c_countusableregsint = 26;
-  c_countusableregsfpu = 31;
-  c_countusableregsmm  = 0;
-
-  maxfpuvarregs = 128;
   maxvarregs = 128;
+  maxfpuvarregs = 128;
 
   max_operands = 4;
 
-  varregs : Array [1..6] of Tregister =
-            (R_9,R_10,R_11,R_12,R_13,R_14);
+{*****************************************************************************
+                          Default generic sizes
+*****************************************************************************}
 
+      { Defines the default address size for a processor, }
+      OS_ADDR = OS_64;
+      { the natural int size for a processor,             }
+      OS_INT = OS_64;
+      OS_SINT = OS_S64;
+      { the maximum float size for a processor,           }
+      OS_FLOAT = OS_F80;
+      { the size of a vector register for a processor     }
+      OS_VECTOR = OS_M128;
+      
 {*****************************************************************************
                        GCC /ABI linking information
 *****************************************************************************}
@@ -155,128 +138,12 @@ Const
      The value of this constant is equal to the constant
      PARM_BOUNDARY / BITS_PER_UNIT in the GCC source.
   }
-  std_param_align = ???;
-
-
-Type
-   TReference = record
-      offset : aword;
-      symbol : pasmsymbol;
-      base : tregister;
-      is_immediate : boolean;
-      offsetfixup : word; {needed for inline}
-      { the boundary to which the reference is surely aligned }
-      alignment : byte;
-   end;
-   PReference = ^TReference;
-
-   tloc = (LOC_INVALID,
-           LOC_REGISTER,
-           LOC_FPU,
-           LOC_MEM,
-           LOC_REFERENCE,
-           LOC_JUMP,
-           { the alpha doesn't have flags, but this }
-           { avoid some conditional compiling       }
-           { DON'T USE for the alpha                }
-           LOC_FLAGS,
-           LOC_CREGISTER,
-           LOC_CFPUREGISTER,
-           LOC_CONST);
-
-   tlocation = record
-   case loc : tloc of
-     LOC_REFERENCE,LOC_MEM : (reference : treference);
-     LOC_CREGISTER,
-     LOC_REGISTER : (register : tregister);
-     LOC_FLAGS : (qp : tqp);
-     LOC_JUMP : ();
-   end;
+  std_param_align = 8;
 
 {*****************************************************************************
                    Opcode propeties (needed for optimizer)
 *****************************************************************************}
 
-{$ifndef NOOPT}
-Type
-{What an instruction can change}
-  TInsChange = (Ch_None);
-{$endif}
-
-
-  { resets all values of ref to defaults }
-  procedure reset_reference(var ref : treference);
-  { set mostly used values of a new reference }
-  function new_reference(base : tregister;offset : longint) : preference;
-  function newreference(const r : treference) : preference;
-  procedure disposereference(var r : preference);
-
-  procedure set_location(var destloc : tlocation;const sourceloc : tlocation);
-
-
-{*****************************************************************************
-                                  Init/Done
-*****************************************************************************}
-
-  procedure InitCpu;
-  procedure DoneCpu;
-
 implementation
 
-  uses
-     verbose;
-
-
-  procedure reset_reference(var ref : treference);
-  begin
-    FillChar(ref,sizeof(treference),0);
-  end;
-
-
-  function new_reference(base : tregister;offset : longint) : preference;
-  var
-    r : preference;
-  begin
-    new(r);
-    FillChar(r^,sizeof(treference),0);
-    r^.offset:=offset;
-    r^.alignment:=8;
-    new_reference:=r;
-  end;
-
-  function newreference(const r : treference) : preference;
-
-  var
-     p : preference;
-  begin
-     new(p);
-     p^:=r;
-     newreference:=p;
-  end;
-
-  procedure disposereference(var r : preference);
-
-  begin
-    dispose(r);
-    r:=Nil;
-  end;
-
-  procedure set_location(var destloc : tlocation;const sourceloc : tlocation);
-
-    begin
-       destloc:=sourceloc;
-    end;
-
-{*****************************************************************************
-                                  Init/Done
-*****************************************************************************}
-
-  procedure InitCpu;
-    begin
-    end;
-
-  procedure DoneCpu;
-    begin
-    end;
-
 end.

+ 44 - 23
compiler/ia64/cpuinfo.pas

@@ -1,5 +1,5 @@
 {
-    Copyright (c) 1998-2000 by Florian Klaempfl
+    Copyright (c) 1998-2006 by Florian Klaempfl
 
     Basic Processor information
 
@@ -19,42 +19,63 @@
 
  ****************************************************************************
 }
-Unit CPUInfo;
+Unit cpuinfo;
 
 {$i fpcdefs.inc}
 
 Interface
 
-Type
-   AWord = QWord;
-
-   { this must be an ordinal type with the same size as a pointer }
-   { to allow some dirty type casts for example when using        }
-   { tconstsym.value                                              }
-   TPointerOrd = longint;
+uses
+  globtype;
 
+Type
    bestreal = extended;
    ts32real = single;
    ts64real = double;
    ts80real = extended;
-   { on the ia64 comp will be mapped to int64 }
-   ts64comp = comp;
+   ts128real = type extended;
+   ts64comp = type extended;
 
    pbestreal=^bestreal;
 
-
-Const
-   { Size of native extended type }
-   extended_size = 10;
-
-   c_countusableregsint = 95;
-   c_countusableregsfpu = 95;
-   c_countusableregsmm  = 0;
-   c_countusableregsqp  = 48;
-
-   { target cpu string (used by compiler options) }
-   target_cpu_string = 'ia64';
+   { possible supported processors for this target }
+   tcputype =
+      (cpu_none,
+       cpu_itanium
+      );
+
+   tfputype =
+     (fpu_none,
+      fpu_itanium
+     );
+     
+const
+   { calling conventions supported by the code generator }
+   supported_calling_conventions : tproccalloptions = [
+     pocall_internproc,
+     pocall_stdcall,
+     pocall_cdecl,
+     pocall_cppdecl
+   ];
+
+
+   cputypestr : array[tcputype] of string[10] = ('',
+     'ITANIUM'
+   );
+
+   fputypestr : array[tfputype] of string[6] = ('',
+     'ITANIUM'
+   );
+
+   { Supported optimizations, only used for information }
+   supported_optimizerswitches = [cs_opt_peephole,cs_opt_regvar,cs_opt_stackframe,
+     cs_opt_asmcse,cs_opt_loopunroll,cs_opt_uncertain];
+
+   level1optimizerswitches = [cs_opt_level1,cs_opt_peephole];
+   level2optimizerswitches = level1optimizerswitches + [cs_opt_level2,cs_opt_regvar,cs_opt_stackframe,cs_opt_asmcse];
+   level3optimizerswitches = level2optimizerswitches + [cs_opt_level3{,cs_opt_loopunroll}];
 
 Implementation
 
 end.
+