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@@ -52,10 +52,10 @@ implementation
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globtype,systems,
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cutils,verbose,globals,
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symconst,symdef,aasm,types,
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- cgbase,cgobj,temp_gen,pass_1,pass_2,
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+ cgbase,cgobj,pass_1,pass_2,
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ncon,
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- cpubase,
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- cga,tgcpu,nppcutil,cgcpu,cg64f32;
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+ cpubase,cpuinfo,cpuasm,cginfo,
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+ ncgutil,cga,cgcpu,cg64f32,rgobj;
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{*****************************************************************************
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TPPCMODDIVNODE
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@@ -65,7 +65,7 @@ implementation
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const
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{ signed overflow }
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divops: array[boolean, boolean] of tasmop =
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- ((A_DIVWU,A_DIVWUO),(A_DIVW,A_DIVWO));
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+ ((A_DIVWU,A_DIVWUO_),(A_DIVW,A_DIVWO_));
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var
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power,
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l1, l2 : longint;
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@@ -85,13 +85,13 @@ implementation
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resultreg := R_NO;
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{ put numerator in register }
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- if (left.location.loc in [LOC_REFERENCE,LOC_MEM]) then
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+ if (left.location.loc in [LOC_REFERENCE,LOC_CREFERENCE]) then
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begin
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- del_reference(left.location.reference);
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- numerator := getregisterint;
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+ reference_release(exprasmlist,left.location.reference);
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+ numerator := rg.getregisterint(exprasmlist);
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{ OS_32 because everything is always converted to longint/ }
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{ cardinal in the resulttype pass (JM) }
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- cg.a_load_ref_reg(expraslist,OS_32,left.location.reference,
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+ cg.a_load_ref_reg(exprasmlist,OS_32,left.location.reference,
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numerator);
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resultreg := numerator;
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end
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@@ -99,7 +99,7 @@ implementation
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begin
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numerator := left.location.register;
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if left.location.loc = LOC_CREGISTER then
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- resultreg := getregisterint
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+ resultreg := rg.getregisterint(exprasmlist)
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else
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resultreg := numerator;
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end;
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@@ -108,7 +108,7 @@ implementation
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(right.nodetype = ordconstn) and
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ispowerof2(tordconstnode(right).value,power) then
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begin
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- { From 'The PowerPC Compiler Writer's Guide": }
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+ { From "The PowerPC Compiler Writer's Guide": }
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{ This code uses the fact that, in the PowerPC architecture, }
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{ the shift right algebraic instructions set the Carry bit if }
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{ the source register contains a negative number and one or }
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@@ -118,7 +118,8 @@ implementation
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{ n = -13, (0xFFFF_FFF3), and k = 2, after executing the srawi }
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{ instruction, q = -4 (0xFFFF_FFFC) and CA = 1. After executing }
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{ the addze instruction, q = -3, the correct quotient. }
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- cg.a_op_const_reg_reg(list,OP_SAR,OS_32,aword(power),numerator,resultreg);
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+ cg.a_op_const_reg_reg(exprasmlist,OP_SAR,OS_32,aword(power),
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+ numerator,resultreg);
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exprasmlist.concat(taicpu.op_reg_reg(A_ADDZE,resultreg,resultreg));
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end
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else
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@@ -127,12 +128,12 @@ implementation
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case right.location.loc of
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LOC_CREGISTER, LOC_REGISTER:
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divider := right.location.register;
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- LOC_REFERENCE, LOC_MEM:
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+ LOC_REFERENCE, LOC_CREFERENCE:
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begin
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divider := cg.get_scratch_reg(exprasmlist);
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cg.a_load_ref_reg(exprasmlist,OS_32,
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right.location.reference,divider);
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- del_reference(right.location.reference);
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+ reference_release(exprasmlist,right.location.reference);
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end;
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end;
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@@ -141,20 +142,20 @@ implementation
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{ the overflow flag (JM) }
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op := divops[is_signed(right.resulttype.def),
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cs_check_overflow in aktlocalswitches];
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- exprasmlist(taicpu.op_reg_reg_reg(op,resultreg,numerator,
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+ exprasmlist.concat(taicpu.op_reg_reg_reg(op,resultreg,numerator,
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divider))
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end;
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{ free used registers }
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- if right.location.loc in [LOC_REFERENCE,LOC_MEM] then
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+ if right.location.loc in [LOC_REFERENCE,LOC_CREFERENCE] then
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cg.free_scratch_reg(exprasmlist,divider)
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else
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- ungetregister(divider);
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+ rg.ungetregister(exprasmlist,divider);
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if numerator <> resultreg then
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- ungetregisterint(numerator);
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+ rg.ungetregisterint(exprasmlist,numerator);
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{ set result location }
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location.loc:=LOC_REGISTER;
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location.register:=resultreg;
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- emitoverflowcheck(self);
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+ cg.g_overflowcheck(exprasmlist,self);
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end;
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@@ -163,6 +164,7 @@ implementation
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*****************************************************************************}
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procedure tppcshlshrnode.pass_2;
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+
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var
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resultreg, hregister1,hregister2,
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hregisterhigh,hregisterlow : tregister;
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@@ -192,44 +194,44 @@ implementation
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end
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else
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begin
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- location.registerhigh := getregisterint;
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- location.registerlow := getregisterint;
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+ location.registerhigh := rg.getregisterint(exprasmlist);
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+ location.registerlow := rg.getregisterint(exprasmlist);
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end;
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end;
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- LOC_REFERENCE,LOC_MEM:
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+ LOC_REFERENCE,LOC_CREFERENCE:
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begin
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{ !!!!!!!! not good, registers are release too soon this way !!!! (JM) }
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- del_reference(left.location.reference);
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- hregisterhigh := getregisterint;
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+ reference_release(exprasmlist,left.location.reference);
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+ hregisterhigh := rg.getregisterint(exprasmlist);
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location.registerhigh := hregisterhigh;
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- hregisterlow := getregisterint;
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+ hregisterlow := rg.getregisterint(exprasmlist);
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location.registerlow := hregisterlow;
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- tcg64f32(cg).a_load64_ref_reg(list,left.location.reference,
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- hregisterlow,hregisterhigh);
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+ tcg64f32(cg).a_load64_ref_reg(exprasmlist,
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+ left.location.reference,hregisterlow,hregisterhigh);
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end;
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end;
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if (right.nodetype = ordconstn) then
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begin
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+ shiftval := tordconstnode(right).value;
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if tordconstnode(right).value > 31 then
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begin
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if nodetype = shln then
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begin
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- if (value and 31) <> 0 then
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- cg.a_op_const_reg_reg(exprasmlist,OP_SHL,OS_32,value and 31,
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- hregisterlow,location.registerhigh)
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+ if (shiftval and 31) <> 0 then
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+ cg.a_op_const_reg_reg(exprasmlist,OP_SHL,OS_32,
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+ shiftval and 31,hregisterlow,location.registerhigh);
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cg.a_load_const_reg(exprasmlist,OS_32,0,location.registerlow);
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end
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else
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begin
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- if (value and 31) <> 0 then
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- cg.a_op_const_reg_reg(exprasmlist,OP_SHR,OS_32,value and 31,
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- hregisterhigh,location.registerlow);
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+ if (shiftval and 31) <> 0 then
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+ cg.a_op_const_reg_reg(exprasmlist,OP_SHR,OS_32,
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+ shiftval and 31,hregisterhigh,location.registerlow);
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cg.a_load_const_reg(exprasmlist,OS_32,0,location.registerhigh);
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end;
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end
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else
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begin
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- shiftval := aword(tordconstnode(right).value;
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if nodetype = shln then
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begin
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exprasmlist.concat(taicpu.op_reg_reg_const_const_const(
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@@ -264,9 +266,9 @@ implementation
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begin
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hregister1 := right.location.register;
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end;
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- LOC_REFERENCE,LOC_MEM:
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+ LOC_REFERENCE,LOC_CREFERENCE:
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begin
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- hregister1 := get_scratch_reg(exprasmlist);
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+ hregister1 := cg.get_scratch_reg(exprasmlist);
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cg.a_load_ref_reg(exprasmlist,OS_S32,
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right.location.reference,hregister1);
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end;
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@@ -285,7 +287,7 @@ implementation
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location.registerlow := resultreg;
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end;
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- getexplicitregisterint(R_0);
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+ rg.getexplicitregisterint(exprasmlist,R_0);
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exprasmlist.concat(taicpu.op_reg_reg_const(A_SUBFIC,
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R_0,hregister1,32));
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exprasmlist.concat(taicpu.op_reg_reg_reg(asmop1,
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@@ -302,24 +304,24 @@ implementation
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location.registerhigh,location.registerhigh,R_0));
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exprasmlist.concat(taicpu.op_reg_reg_reg(asmop1,
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location.registerlow,hregisterlow,hregister1));
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- ungetregister(R_0);
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-
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- if right.location.loc in [LOC_MEM,LOC_REFERENCE] then
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- free_scratch_reg(exprasmlist,hregister1)
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+ rg.ungetregister(exprasmlist,R_0);
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+
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+ if right.location.loc in [LOC_CREFERENCE,LOC_REFERENCE] then
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+ cg.free_scratch_reg(exprasmlist,hregister1)
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else
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- ungetregister(hregister1);
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+ rg.ungetregister(exprasmlist,hregister1);
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end
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end
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else
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begin
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{ load left operators in a register }
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- if (left.location.loc in [LOC_REFERENCE,LOC_MEM]) then
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+ if (left.location.loc in [LOC_REFERENCE,LOC_CREFERENCE]) then
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begin
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- del_reference(left.location.reference);
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- hregister1 := getregisterint;
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+ reference_release(exprasmlist,left.location.reference);
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+ hregister1 := rg.getregisterint(exprasmlist);
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{ OS_32 because everything is always converted to longint/ }
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{ cardinal in the resulttype pass (JM) }
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- cg.a_load_ref_reg(expraslist,OS_32,left.location.reference,
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+ cg.a_load_ref_reg(exprasmlist,OS_32,left.location.reference,
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hregister1);
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resultreg := hregister1;
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end
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@@ -327,7 +329,7 @@ implementation
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begin
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hregister1 := left.location.register;
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if left.location.loc = LOC_CREGISTER then
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- resultreg := getregisterint
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+ resultreg := rg.getregisterint(exprasmlist)
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else
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resultreg := hregister1;
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end;
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@@ -340,30 +342,30 @@ implementation
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{ shifting by a constant directly coded: }
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if (right.nodetype=ordconstn) then
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- cg.a_op_reg_reg_const(exprasmlist,op,OS_32,resultreg,
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- hregister1,tordconstnode(right).value and 31)
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+ cg.a_op_const_reg_reg(exprasmlist,op,OS_32,
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+ tordconstnode(right).value and 31,hregister1,resultreg)
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else
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begin
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{ load shift count in a register if necessary }
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case right.location.loc of
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LOC_CREGISTER, LOC_REGISTER:
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hregister2 := right.location.register;
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- LOC_REFERENCE, LOC_MEM:
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+ LOC_REFERENCE, LOC_CREFERENCE:
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begin
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hregister2 := cg.get_scratch_reg(exprasmlist);
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cg.a_load_ref_reg(exprasmlist,OS_32,
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right.location.reference,hregister2);
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- del_reference(right.location.reference);
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+ reference_release(exprasmlist,right.location.reference);
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end;
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end;
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- tcgppc(cg).a_op_reg_reg_reg(exprasmlist,op,hregister1,
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+ tcgppc(cg).a_op_reg_reg_reg(exprasmlist,op,OS_32,hregister1,
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hregister2,resultreg);
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- if right.location.loc in [LOC_REFERENCE,LOC_MEM] then
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+ if right.location.loc in [LOC_REFERENCE,LOC_CREFERENCE] then
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cg.free_scratch_reg(exprasmlist,hregister2)
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else
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- ungetregister(hregister2);
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+ rg.ungetregister(exprasmlist,hregister2);
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end;
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{ set result location }
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location.loc:=LOC_REGISTER;
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@@ -381,6 +383,7 @@ implementation
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var
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src1, src2, tmp: tregister;
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op: tasmop;
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+
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begin
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secondpass(left);
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if is_64bitint(left.resulttype.def) then
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@@ -399,16 +402,16 @@ implementation
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end
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else
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begin
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- location.registerlow := getregisterint;
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- location.registerhigh := getregisterint;
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+ location.registerlow := rg.getregisterint(exprasmlist);
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+ location.registerhigh := rg.getregisterint(exprasmlist);
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end;
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end;
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- LOC_REFERENCE,LOC_MEM :
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+ LOC_REFERENCE,LOC_CREFERENCE :
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begin
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- del_reference(left.location.reference);
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- location.registerlow:=getregisterint;
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+ reference_release(exprasmlist,left.location.reference);
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+ location.registerlow:=rg.getregisterint(exprasmlist);
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src1 := location.registerlow;
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- location.registerhigh:=getregisterint;
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+ location.registerhigh:=rg.getregisterint(exprasmlist);
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src2 := location.registerhigh;
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tcg64f32(cg).a_load64_ref_reg(exprasmlist,left.location.reference,
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location.registerlow,
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@@ -417,13 +420,15 @@ implementation
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end;
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exprasmlist.concat(taicpu.op_reg_reg(A_NEG,location.registerlow,
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src1));
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- cg.a_op_reg_reg(OP_NOT,OS_32,src2,location.registerhigh);
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+ cg.a_op_reg_reg(exprasmlist,OP_NOT,OS_32,src2,location.registerhigh);
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tmp := cg.get_scratch_reg(exprasmlist);
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- tcgppc(cg).a_op_const_reg_reg(OP_SAR,31,location.registerlow,tmp);
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+ cg.a_op_const_reg_reg(exprasmlist,OP_SAR,OS_32,31,location.registerlow,
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+ tmp);
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if not(cs_check_overflow in aktlocalswitches) then
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- cg.a_op_reg_reg(OP_ADD,OS_32,location.registerhigh,tmp)
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+ cg.a_op_reg_reg(exprasmlist,OP_ADD,OS_32,location.registerhigh,
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+ tmp)
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else
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- exprasmlist.concat(taicpu.op_reg_reg_reg(A_ADDO,tmp,
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+ exprasmlist.concat(taicpu.op_reg_reg_reg(A_ADDO_,tmp,
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location.registerhigh,tmp));
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cg.free_scratch_reg(exprasmlist,tmp);
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end
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@@ -431,7 +436,7 @@ implementation
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begin
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location.loc:=LOC_REGISTER;
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case left.location.loc of
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- LOC_FPU, LOC_REGISTER:
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+ LOC_FPUREGISTER, LOC_REGISTER:
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begin
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src1 := left.location.register;
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location.register := src1;
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@@ -440,23 +445,24 @@ implementation
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begin
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src1 := left.location.register;
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if left.location.loc = LOC_CREGISTER then
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- location.register := getregisterint
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+ location.register := rg.getregisterint(exprasmlist)
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else
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- location.register := getregisterfpu;
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+ location.register := rg.getregisterfpu(exprasmlist);
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end;
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- LOC_REFERENCE,LOC_MEM:
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+ LOC_REFERENCE,LOC_CREFERENCE:
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begin
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- del_reference(left.location.reference);
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+ reference_release(exprasmlist,left.location.reference);
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if (left.resulttype.def.deftype=floatdef) then
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begin
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- src1 := getregisterfpu;
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+ src1 := rg.getregisterfpu(exprasmlist);
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location.register := src1;
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- floatload(tfloatdef(left.resulttype.def).typ,
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+ cg.a_loadfpu_ref_reg(exprasmlist,
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+ def_cgsize(left.resulttype.def),
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left.location.reference,src1);
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end
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else
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begin
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- src1 := getregisterint;
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+ src1 := rg.getregisterint(exprasmlist);
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location.register:= src1;
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cg.a_load_ref_reg(exprasmlist,OS_32,
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left.location.reference,src1);
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@@ -464,15 +470,15 @@ implementation
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end;
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end;
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{ choose appropriate operand }
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|
|
- if left.resulttype.def <> floatdef then
|
|
|
+ if left.resulttype.def.deftype <> floatdef then
|
|
|
if not(cs_check_overflow in aktlocalswitches) then
|
|
|
op := A_NEG
|
|
|
else
|
|
|
- op := A_NEGO
|
|
|
+ op := A_NEGO_
|
|
|
else
|
|
|
op := A_FNEG;
|
|
|
{ emit operation }
|
|
|
- eprasmlist.concat(taicpu.op_reg_reg(op,location.register,src1));
|
|
|
+ exprasmlist.concat(taicpu.op_reg_reg(op,location.register,src1));
|
|
|
end;
|
|
|
{ Here was a problem... }
|
|
|
{ Operand to be negated always }
|
|
|
@@ -480,7 +486,7 @@ implementation
|
|
|
{ 32-bit before doing neg!! }
|
|
|
{ So this is useless... }
|
|
|
{ that's not true: -2^31 gives an overflow error if it is negated (FK) }
|
|
|
- emitoverflowcheck(self);
|
|
|
+ cg.g_overflowcheck(exprasmlist,self);
|
|
|
end;
|
|
|
|
|
|
|
|
|
@@ -489,16 +495,18 @@ implementation
|
|
|
*****************************************************************************}
|
|
|
|
|
|
procedure tppcnotnode.pass_2;
|
|
|
+
|
|
|
var
|
|
|
hl : tasmlabel;
|
|
|
regl, regh: tregister;
|
|
|
+
|
|
|
begin
|
|
|
if is_boolean(resulttype.def) then
|
|
|
begin
|
|
|
{ the second pass could change the location of left }
|
|
|
{ if it is a register variable, so we've to do }
|
|
|
{ this before the case statement }
|
|
|
- if left.location.loc in [LOC_REFERENCE,LOC_MEM,
|
|
|
+ if left.location.loc in [LOC_REFERENCE,LOC_CREFERENCE,
|
|
|
LOC_FLAGS,LOC_REGISTER,LOC_CREGISTER] then
|
|
|
secondpass(left);
|
|
|
case left.location.loc of
|
|
|
@@ -514,22 +522,25 @@ implementation
|
|
|
falselabel:=hl;
|
|
|
end;
|
|
|
LOC_FLAGS :
|
|
|
- location.resflags:=inverse_flags(left.location.resflags);
|
|
|
- LOC_REGISTER, LOC_CREGISTER, LOC_REFERENCE, LOC_MEM :
|
|
|
+ begin
|
|
|
+ location.resflags:=left.location.resflags;
|
|
|
+ inverse_flags(left.location.resflags);
|
|
|
+ end;
|
|
|
+ LOC_REGISTER, LOC_CREGISTER, LOC_REFERENCE, LOC_CREFERENCE :
|
|
|
begin
|
|
|
if left.location.loc in [LOC_REGISTER,LOC_CREGISTER] then
|
|
|
regl := left.location.register
|
|
|
else
|
|
|
begin
|
|
|
- regl := getregisterint;
|
|
|
+ regl := rg.getregisterint(exprasmlist);
|
|
|
cg.a_load_ref_reg(exprasmlist,def_cgsize(left.resulttype.def),
|
|
|
left.location.reference,regl);
|
|
|
end;
|
|
|
location.loc:=LOC_FLAGS;
|
|
|
- location.resflags.cr:=0;
|
|
|
+ location.resflags.cr:=r_cr0;
|
|
|
location.resflags.flag:=F_EQ;
|
|
|
exprasmlist.concat(taicpu.op_reg_const(A_CMPWI,regl,0));
|
|
|
- ungetregister(regl);
|
|
|
+ rg.ungetregister(exprasmlist,regl);
|
|
|
end;
|
|
|
end;
|
|
|
end
|
|
|
@@ -540,10 +551,10 @@ implementation
|
|
|
location.loc:=LOC_REGISTER;
|
|
|
{ make sure left is in a register and set the dest register }
|
|
|
case left.location.loc of
|
|
|
- LOC_REFERENCE, LOC_MEM, LOC_CREGISTER:
|
|
|
+ LOC_REFERENCE, LOC_CREFERENCE, LOC_CREGISTER:
|
|
|
begin
|
|
|
- location.registerlow := getregisterint;
|
|
|
- location.registerhigh := getregisterint;
|
|
|
+ location.registerlow := rg.getregisterint(exprasmlist);
|
|
|
+ location.registerhigh := rg.getregisterint(exprasmlist);
|
|
|
if left.location.loc <> LOC_CREGISTER then
|
|
|
begin
|
|
|
tcg64f32(cg).a_load64_ref_reg(exprasmlist,
|
|
|
@@ -568,9 +579,9 @@ implementation
|
|
|
end;
|
|
|
{ perform the NOT operation }
|
|
|
exprasmlist.concat(taicpu.op_reg_reg(A_NOT,location.registerhigh,
|
|
|
- regh);
|
|
|
+ regh));
|
|
|
exprasmlist.concat(taicpu.op_reg_reg(A_NOT,location.registerlow,
|
|
|
- regl);
|
|
|
+ regl));
|
|
|
end
|
|
|
else
|
|
|
begin
|
|
|
@@ -579,13 +590,14 @@ implementation
|
|
|
location.loc:=LOC_REGISTER;
|
|
|
{ make sure left is in a register and set the dest register }
|
|
|
case left.location.loc of
|
|
|
- LOC_REFERENCE, LOC_MEM, LOC_CREGISTER:
|
|
|
+ LOC_REFERENCE, LOC_CREFERENCE, LOC_CREGISTER:
|
|
|
begin
|
|
|
- location.register := getregisterint;
|
|
|
+ location.register := rg.getregisterint(exprasmlist);
|
|
|
if left.location.loc <> LOC_CREGISTER then
|
|
|
begin
|
|
|
- cg.a_load_ref_reg(exprasmlist,left.location.reference,
|
|
|
- location.register);
|
|
|
+ cg.a_load_ref_reg(exprasmlist,
|
|
|
+ def_cgsize(left.resulttype.def),
|
|
|
+ left.location.reference,location.register);
|
|
|
regl := location.register;
|
|
|
end
|
|
|
else
|
|
|
@@ -596,10 +608,10 @@ implementation
|
|
|
end;
|
|
|
{ perform the NOT operation }
|
|
|
exprasmlist.concat(taicpu.op_reg_reg(A_NOT,location.register,
|
|
|
- regl);
|
|
|
+ regl));
|
|
|
{ release the source reg if it wasn't reused }
|
|
|
if regl <> location.register then
|
|
|
- ungetregisterint(regl);
|
|
|
+ rg.ungetregisterint(exprasmlist,regl);
|
|
|
end;
|
|
|
end;
|
|
|
|
|
|
@@ -611,7 +623,10 @@ begin
|
|
|
end.
|
|
|
{
|
|
|
$Log$
|
|
|
- Revision 1.2 2002-01-03 14:57:52 jonas
|
|
|
+ Revision 1.3 2002-04-06 18:13:02 jonas
|
|
|
+ * several powerpc-related additions and fixes
|
|
|
+
|
|
|
+ Revision 1.2 2002/01/03 14:57:52 jonas
|
|
|
* completed (not compilale yet though)
|
|
|
|
|
|
Revision 1.1 2001/12/29 15:28:58 jonas
|
Jonas Maebe