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@@ -458,7 +458,25 @@ unit cgobj;
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function g_indirect_sym_load(list:TAsmList;const symname: string; const flags: tindsymflags): tregister;virtual;
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end;
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-{$ifndef cpu64bitalu}
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+{$ifdef cpu64bitalu}
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+ { This class implements an abstract code generator class
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+ for 128 Bit operations, it applies currently only to 64 Bit CPUs and supports only simple operations
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+ }
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+ tcg128 = class
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+ procedure a_load128_reg_reg(list : TAsmList;regsrc,regdst : tregister128);virtual;
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+ procedure a_load128_reg_ref(list : TAsmList;reg : tregister128;const ref : treference);virtual;
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+ procedure a_load128_loc_ref(list : TAsmList;const l : tlocation;const ref : treference);virtual;
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+ procedure a_load128_reg_loc(list : TAsmList;reg : tregister128;const l : tlocation);virtual;
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+
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+ procedure a_load128_loc_cgpara(list : TAsmList;const l : tlocation;const paraloc : TCGPara);virtual;
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+ procedure a_load128_ref_cgpara(list: TAsmList; const r: treference;const paraloc: tcgpara);
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+ procedure a_load128_reg_cgpara(list: TAsmList; reg: tregister128;const paraloc: tcgpara);
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+ end;
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+
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+ { Creates a tregister128 record from 2 64 Bit registers. }
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+ function joinreg128(reglo,reghi : tregister) : tregister128;
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+
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+{$else cpu64bitalu}
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{# @abstract(Abstract code generator for 64 Bit operations)
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This class implements an abstract code generator class
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for 64 Bit operations.
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@@ -474,7 +492,6 @@ unit cgobj;
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procedure a_load64_const_loc(list : TAsmList;value : int64;const l : tlocation);virtual;abstract;
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procedure a_load64_reg_loc(list : TAsmList;reg : tregister64;const l : tlocation);virtual;abstract;
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-
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procedure a_load64_subsetref_reg(list : TAsmList; const sref: tsubsetreference; destreg: tregister64);virtual;abstract;
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procedure a_load64_reg_subsetref(list : TAsmList; fromreg: tregister64; const sref: tsubsetreference);virtual;abstract;
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procedure a_load64_const_subsetref(list: TAsmlist; a: int64; const sref: tsubsetreference);virtual;abstract;
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@@ -537,10 +554,13 @@ unit cgobj;
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{$endif cpu64bitalu}
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var
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- {# Main code generator class }
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+ { Main code generator class }
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cg : tcg;
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-{$ifndef cpu64bitalu}
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- {# Code generator class for all operations working with 64-Bit operands }
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+{$ifdef cpu64bitalu}
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+ { Code generator class for all operations working with 128-Bit operands }
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+ cg128 : tcg128;
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+{$else cpu64bitalu}
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+ { Code generator class for all operations working with 64-Bit operands }
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cg64 : tcg64;
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{$endif cpu64bitalu}
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@@ -556,7 +576,6 @@ implementation
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tgobj,cutils,procinfo,
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ncgrtti;
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-
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{*****************************************************************************
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basic functionallity
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******************************************************************************}
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@@ -2508,6 +2527,204 @@ implementation
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internalerror(2006082211);
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end;
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end;
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+{$else cpu64bitalu}
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+
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+ function joinreg128(reglo, reghi: tregister): tregister128;
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+ begin
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+ result.reglo:=reglo;
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+ result.reghi:=reghi;
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+ end;
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+
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+
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+ procedure splitparaloc128(const cgpara:tcgpara;var cgparalo,cgparahi:tcgpara);
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+ var
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+ paraloclo,
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+ paralochi : pcgparalocation;
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+ begin
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+ if not(cgpara.size in [OS_128,OS_S128]) then
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+ internalerror(2012090604);
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+ if not assigned(cgpara.location) then
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+ internalerror(2012090605);
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+ { init lo/hi para }
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+ cgparahi.reset;
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+ if cgpara.size=OS_S128 then
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+ cgparahi.size:=OS_S64
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+ else
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+ cgparahi.size:=OS_64;
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+ cgparahi.intsize:=8;
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+ cgparahi.alignment:=cgpara.alignment;
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+ paralochi:=cgparahi.add_location;
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+ cgparalo.reset;
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+ cgparalo.size:=OS_64;
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+ cgparalo.intsize:=8;
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+ cgparalo.alignment:=cgpara.alignment;
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+ paraloclo:=cgparalo.add_location;
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+ { 2 parameter fields? }
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+ if assigned(cgpara.location^.next) then
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+ begin
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+ { Order for multiple locations is always
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+ paraloc^ -> high
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+ paraloc^.next -> low }
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+ if (target_info.endian=ENDIAN_BIG) then
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+ begin
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+ { paraloc^ -> high
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+ paraloc^.next -> low }
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+ move(cgpara.location^,paralochi^,sizeof(paralochi^));
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+ move(cgpara.location^.next^,paraloclo^,sizeof(paraloclo^));
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+ end
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+ else
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+ begin
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+ { paraloc^ -> low
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+ paraloc^.next -> high }
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+ move(cgpara.location^,paraloclo^,sizeof(paraloclo^));
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+ move(cgpara.location^.next^,paralochi^,sizeof(paralochi^));
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+ end;
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+ end
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+ else
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+ begin
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+ { single parameter, this can only be in memory }
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+ if cgpara.location^.loc<>LOC_REFERENCE then
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+ internalerror(2012090606);
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+ move(cgpara.location^,paraloclo^,sizeof(paraloclo^));
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+ move(cgpara.location^,paralochi^,sizeof(paralochi^));
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+ { for big endian low is at +8, for little endian high }
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+ if target_info.endian = endian_big then
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+ begin
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+ inc(cgparalo.location^.reference.offset,8);
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+ cgparalo.alignment:=newalignment(cgparalo.alignment,8);
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+ end
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+ else
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+ begin
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+ inc(cgparahi.location^.reference.offset,8);
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+ cgparahi.alignment:=newalignment(cgparahi.alignment,8);
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+ end;
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+ end;
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+ { fix size }
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+ paraloclo^.size:=cgparalo.size;
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+ paraloclo^.next:=nil;
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+ paralochi^.size:=cgparahi.size;
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+ paralochi^.next:=nil;
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+ end;
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+
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+
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+
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+
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+ procedure tcg128.a_load128_reg_reg(list: TAsmList; regsrc,
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+ regdst: tregister128);
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+ begin
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+ cg.a_load_reg_reg(list,OS_64,OS_64,regsrc.reglo,regdst.reglo);
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+ cg.a_load_reg_reg(list,OS_64,OS_64,regsrc.reghi,regdst.reghi);
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+ end;
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+
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+
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+ procedure tcg128.a_load128_reg_ref(list: TAsmList; reg: tregister128;
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+ const ref: treference);
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+ var
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+ tmpreg: tregister;
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+ tmpref: treference;
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+ begin
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+ if target_info.endian = endian_big then
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+ begin
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+ tmpreg:=reg.reglo;
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+ reg.reglo:=reg.reghi;
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+ reg.reghi:=tmpreg;
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+ end;
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+ cg.a_load_reg_ref(list,OS_64,OS_64,reg.reglo,ref);
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+ tmpref := ref;
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+ inc(tmpref.offset,8);
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+ cg.a_load_reg_ref(list,OS_64,OS_64,reg.reghi,tmpref);
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+ end;
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+
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+
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+ procedure tcg128.a_load128_loc_ref(list: TAsmList; const l: tlocation;
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+ const ref: treference);
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+ begin
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+ case l.loc of
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+ LOC_REGISTER,LOC_CREGISTER:
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+ a_load128_reg_ref(list,l.register128,ref);
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+ { not yet implemented:
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+ LOC_CONSTANT :
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+ a_load128_const_ref(list,l.value128,ref);
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+ LOC_SUBSETREF, LOC_CSUBSETREF:
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+ a_load64_subsetref_ref(list,l.sref,ref); }
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+ else
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+ internalerror(201209061);
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+ end;
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+ end;
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+
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+
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+ procedure tcg128.a_load128_reg_loc(list: TAsmList; reg: tregister128;
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+ const l: tlocation);
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+ begin
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+ case l.loc of
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+ LOC_REFERENCE, LOC_CREFERENCE:
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+ a_load128_reg_ref(list,reg,l.reference);
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+ LOC_REGISTER,LOC_CREGISTER:
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+ a_load128_reg_reg(list,reg,l.register128);
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+ { not yet implemented:
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+ LOC_SUBSETREF, LOC_CSUBSETREF:
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+ a_load64_reg_subsetref(list,reg,l.sref);
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+ LOC_MMREGISTER, LOC_CMMREGISTER:
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+ a_loadmm_intreg64_reg(list,l.size,reg,l.register); }
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+ else
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+ internalerror(201209062);
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+ end;
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+ end;
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+
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+
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+ procedure tcg128.a_load128_loc_cgpara(list: TAsmList; const l: tlocation;
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+ const paraloc: TCGPara);
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+ begin
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+ case l.loc of
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+ LOC_REGISTER,
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+ LOC_CREGISTER :
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+ a_load128_reg_cgpara(list,l.register128,paraloc);
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+ {not yet implemented:
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+ LOC_CONSTANT :
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+ a_load128_const_cgpara(list,l.value64,paraloc);
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+ }
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+ LOC_CREFERENCE,
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+ LOC_REFERENCE :
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+ a_load128_ref_cgpara(list,l.reference,paraloc);
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+ else
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+ internalerror(2012090603);
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+ end;
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+ end;
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+
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+
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+ procedure tcg128.a_load128_reg_cgpara(list : TAsmList;reg : tregister128;const paraloc : tcgpara);
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+ var
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+ tmplochi,tmploclo: tcgpara;
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+ begin
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+ tmploclo.init;
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+ tmplochi.init;
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+ splitparaloc128(paraloc,tmploclo,tmplochi);
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+ cg.a_load_reg_cgpara(list,OS_64,reg.reghi,tmplochi);
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+ cg.a_load_reg_cgpara(list,OS_64,reg.reglo,tmploclo);
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+ tmploclo.done;
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+ tmplochi.done;
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+ end;
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+
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+
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+ procedure tcg128.a_load128_ref_cgpara(list : TAsmList;const r : treference;const paraloc : tcgpara);
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+ var
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+ tmprefhi,tmpreflo : treference;
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+ tmploclo,tmplochi : tcgpara;
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+ begin
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+ tmploclo.init;
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+ tmplochi.init;
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+ splitparaloc128(paraloc,tmploclo,tmplochi);
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+ tmprefhi:=r;
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+ tmpreflo:=r;
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+ if target_info.endian=endian_big then
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+ inc(tmpreflo.offset,8)
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+ else
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+ inc(tmprefhi.offset,8);
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+ cg.a_load_ref_cgpara(list,OS_64,tmprefhi,tmplochi);
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+ cg.a_load_ref_cgpara(list,OS_64,tmpreflo,tmploclo);
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+ tmploclo.done;
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+ tmplochi.done;
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+ end;
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{$endif cpu64bitalu}
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function asmsym2indsymflags(sym: TAsmSymbol): tindsymflags;
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@@ -2523,7 +2740,10 @@ implementation
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begin
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cg.free;
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cg:=nil;
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-{$ifndef cpu64bitalu}
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+{$ifdef cpu64bitalu}
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+ cg128.free;
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+ cg128:=nil;
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+{$else cpu64bitalu}
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cg64.free;
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cg64:=nil;
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{$endif cpu64bitalu}
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florian