Handle LDRD and STRD correctly in RegInInstruction for ARM

LDRD and STRD only have the first even numbered register in their instruction operands,
this additional code will also check for the register following it.
Example:
  ldrd r0, [r13]

The old code will only detect r0 as in use, not the implicit r1.

git-svn-id: trunk@26602 -

compiler/arm/aoptcpu.pas

@@ -2119,6 +2119,9 @@ Implementation
     begin
       If (p1.typ = ait_instruction) and (taicpu(p1).opcode=A_BL) then
         Result:=true
+      else If MatchInstruction(p1, [A_LDR, A_STR], [], [PF_D]) and
+              (getsupreg(taicpu(p1).oper[0]^.reg)+1=getsupreg(reg)) then
+        Result:=true
       else
         Result:=inherited RegInInstruction(Reg, p1);
     end;