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@@ -0,0 +1,510 @@
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+{
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+ $Id$
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+ Copyright (c) 1998-2002 by Florian Klaempfl
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+
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+ Generate i386 assembler for math nodes
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+
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+ This program is free software; you can redistribute it and/or modify
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+ it under the terms of the GNU General Public License as published by
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+ the Free Software Foundation; either version 2 of the License, or
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+ (at your option) any later version.
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+
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+ This program is distributed in the hope that it will be useful,
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+ but WITHOUT ANY WARRANTY; without even the implied warranty of
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+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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+ GNU General Public License for more details.
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+
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+ You should have received a copy of the GNU General Public License
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+ along with this program; if not, write to the Free Software
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+ Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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+
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+ ****************************************************************************
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+}
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+unit ncgmat;
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+
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+{$i fpcdefs.inc}
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+
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+interface
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+
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+ uses
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+ node,nmat;
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+
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+ type
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+ tm68kmoddivnode = class(tmoddivnode)
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+ procedure pass_2;override;
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+ end;
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+
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+ tm68kshlshrnode = class(tshlshrnode)
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+ procedure pass_2;override;
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+ end;
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+
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+ tm68knotnode = class(tnotnode)
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+ procedure pass_2;override;
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+ end;
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+
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+implementation
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+
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+ uses
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+ globtype,systems,
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+ cutils,verbose,globals,
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+ symconst,symdef,aasmbase,aasmtai,aasmcpu,defbase,
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+ cginfo,cgbase,pass_1,pass_2,
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+ ncon,
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+ cpubase,cpuinfo,
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+ tgobj,ncgutil,cgobj,rgobj,rgcpu;
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+
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+{*****************************************************************************
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+ TI386MODDIVNODE
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+*****************************************************************************}
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+
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+ procedure tm68kmoddivnode.pass_2;
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+ var
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+ hreg1 : tregister;
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+ hreg2 : tregister;
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+ hdenom : tregister;
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+ shrdiv,popeax,popedx : boolean;
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+ power : longint;
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+ hl : tasmlabel;
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+ pushedregs : tmaybesave;
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+ begin
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+ shrdiv := false;
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+ secondpass(left);
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+ if codegenerror then
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+ exit;
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+ maybe_save(exprasmlist,right.registers32,left.location,pushedregs);
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+ secondpass(right);
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+ maybe_restore(exprasmlist,left.location,pushedregs);
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+ if codegenerror then
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+ exit;
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+ location_copy(location,left.location);
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+
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+ if is_64bitint(resulttype.def) then
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+ begin
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+ { should be handled in pass_1 (JM) }
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+ internalerror(200109052);
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+ end
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+ else
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+ begin
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+ { put numerator in register }
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+ location_force_reg(exprasmlist,left.location,OS_INT,false);
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+ hreg1:=left.location.register;
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+
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+ if (nodetype=divn) and
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+ (right.nodetype=ordconstn) and
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+ ispowerof2(tordconstnode(right).value,power) then
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+ Begin
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+ shrdiv := true;
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+ { for signed numbers, the numerator must be adjusted before the
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+ shift instruction, but not wih unsigned numbers! Otherwise,
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+ "Cardinal($ffffffff) div 16" overflows! (JM) }
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+ If is_signed(left.resulttype.def) Then
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+ Begin
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+ objectlibrary.getlabel(hl);
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+ cg.a_cmp_const_reg_label(exprasmlist,OS_INT,OC_GT,0,hreg,hl);
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+ if power=1 then
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+ cg.a_op_const_reg(exprasmlist,OP_ADD,OS_32,1,hreg1)
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+ else
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+ cg.a_op_const_reg(exprasmlist,OP_ADD,OS_32,
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+ tordconstnode(right).value-1,hreg1);
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+ cg.a_label(exprasmlist,hl);
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+ cg.a_op_const_reg(exprasmlist,OP_SAR,OS_INT,power,hreg1);
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+ End
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+ Else { not signed }
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+ Begin
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+ cg.a_op_const_reg(exprasmlist,OP_SHR,OS_INT,power,hreg1);
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+ end;
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+ End
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+ else
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+ begin
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+ { bring denominator to D1 }
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+ { D1 is always free, it's }
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+ { only used for temporary }
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+ { purposes }
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+ hdenom := rg.getregisterint(exprasmlist);
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+ if right.location.loc<>LOC_CREGISTER then
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+ location_release(exprasmlist,right.location);
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+ cg.a_load_loc_reg(exprasmlist,right.location,hdenom);
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+
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+ { verify if the divisor is zero, if so return an error
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+ immediately
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+ }
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+ objectlibrary.getlabel(hl1);
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+ cg.a_cmp_const_reg_label(exprasmlist,OS_INT,OC_NE,0,hdenom,hl1);
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+ cg.a_param_reg(exprasmlist,OS_S32,paramanager.getintparaloc(1));
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+ cg.a_call_name('FPC_HANDLERROR');
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+ cg.a_label(exprasmlist,hl1);
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+{ This should be moved to emit_moddiv_reg_reg }
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+ if is_signed(left.resulttype.def) then
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+ cg.a_op_reg_reg(exprasmlist,OS_INT,OP_IDIV,hdenom,hreg1)
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+ else
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+ cg.a_op_reg_reg(exprasmlist,OS_INT,OP_DIV,hdenom,hreg1);
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+ if nodetype = modn then
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+ begin
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+{$warning modnode should be tested}
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+ { multiply by denominator to get modulo }
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+ cg.a_op_reg_reg(exprasmlist,OS_INT,OP_IMUL,hdenom,hreg1)
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+ end;
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+ end;
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+ location_reset(location,LOC_REGISTER,OS_INT);
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+ location.register:=hreg1;
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+ end;
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+ end;
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+
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+
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+{*****************************************************************************
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+ TI386SHLRSHRNODE
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+*****************************************************************************}
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+
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+ procedure tm68kshlshrnode.pass_2;
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+ var
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+ hregister2,hregister3,
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+ hregisterhigh,hregisterlow : tregister;
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+ popecx : boolean;
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+ op : tasmop;
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+ l1,l2,l3 : tasmlabel;
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+ pushedregs : tmaybesave;
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+ begin
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+ popecx:=false;
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+
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+ secondpass(left);
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+ maybe_save(exprasmlist,right.registers32,left.location,pushedregs);
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+ secondpass(right);
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+ maybe_restore(exprasmlist,left.location,pushedregs);
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+
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+ { determine operator }
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+ case nodetype of
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+ shln: op:=A_SHL;
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+ shrn: op:=A_SHR;
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+ end;
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+(*
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+ if is_64bitint(left.resulttype.def) then
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+ begin
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+ location_reset(location,LOC_REGISTER,OS_64);
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+
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+ { load left operator in a register }
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+ location_force_reg(exprasmlist,left.location,OS_64,false);
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+ hregisterhigh:=left.location.registerhigh;
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+ hregisterlow:=left.location.registerlow;
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+
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+ { shifting by a constant directly coded: }
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+ if (right.nodetype=ordconstn) then
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+ begin
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+ { shrd/shl works only for values <=31 !! }
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+ if tordconstnode(right).value>31 then
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+ begin
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+ if nodetype=shln then
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+ begin
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+ emit_reg_reg(A_XOR,S_L,hregisterhigh,
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+ hregisterhigh);
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+ if ((tordconstnode(right).value and 31) <> 0) then
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+ emit_const_reg(A_SHL,S_L,tordconstnode(right).value and 31,
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+ hregisterlow);
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+ end
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+ else
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+ begin
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+ emit_reg_reg(A_XOR,S_L,hregisterlow,
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+ hregisterlow);
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+ if ((tordconstnode(right).value and 31) <> 0) then
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+ emit_const_reg(A_SHR,S_L,tordconstnode(right).value and 31,
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+ hregisterhigh);
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+ end;
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+ location.registerhigh:=hregisterlow;
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+ location.registerlow:=hregisterhigh;
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+ end
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+ else
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+ begin
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+ if nodetype=shln then
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+ begin
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+ emit_const_reg_reg(A_SHLD,S_L,tordconstnode(right).value and 31,
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+ hregisterlow,hregisterhigh);
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+ emit_const_reg(A_SHL,S_L,tordconstnode(right).value and 31,
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+ hregisterlow);
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+ end
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+ else
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+ begin
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+ emit_const_reg_reg(A_SHRD,S_L,tordconstnode(right).value and 31,
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+ hregisterhigh,hregisterlow);
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+ emit_const_reg(A_SHR,S_L,tordconstnode(right).value and 31,
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+ hregisterhigh);
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+ end;
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+ location.registerlow:=hregisterlow;
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+ location.registerhigh:=hregisterhigh;
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+ end;
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+ end
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+ else
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+ begin
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+ { load right operators in a register }
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+ if right.location.loc<>LOC_REGISTER then
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+ begin
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+ if right.location.loc<>LOC_CREGISTER then
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+ location_release(exprasmlist,right.location);
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+ hregister2:=rg.getexplicitregisterint(exprasmlist,R_ECX);
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+ cg.a_load_loc_reg(exprasmlist,right.location,hregister2);
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+ end
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+ else
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+ hregister2:=right.location.register;
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+
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+ { left operator is already in a register }
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+ { hence are both in a register }
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+ { is it in the case ECX ? }
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+ if (hregisterlow=R_ECX) then
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+ begin
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+ { then only swap }
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+ emit_reg_reg(A_XCHG,S_L,hregisterlow,hregister2);
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+ hregister3:=hregisterlow;
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+ hregisterlow:=hregister2;
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+ hregister2:=hregister3;
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+ end
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+ else if (hregisterhigh=R_ECX) then
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+ begin
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+ { then only swap }
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+ emit_reg_reg(A_XCHG,S_L,hregisterhigh,hregister2);
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+ hregister3:=hregisterhigh;
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+ hregisterhigh:=hregister2;
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+ hregister2:=hregister3;
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+ end
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+
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+ { if second operator not in ECX ? }
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+ else if (hregister2<>R_ECX) then
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+ begin
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+ { ECX occupied then push it }
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+ if not (R_ECX in rg.unusedregsint) then
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+ begin
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+ popecx:=true;
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+ emit_reg(A_PUSH,S_L,R_ECX);
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+ end
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+ else
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+ rg.getexplicitregisterint(exprasmlist,R_ECX);
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+ emit_reg_reg(A_MOV,S_L,hregister2,R_ECX);
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+ end;
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+
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+ if hregister2 <> R_ECX then
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+ rg.ungetregisterint(exprasmlist,hregister2);
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+
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+ { the damned shift instructions work only til a count of 32 }
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+ { so we've to do some tricks here }
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+ if nodetype=shln then
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+ begin
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+ objectlibrary.getlabel(l1);
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+ objectlibrary.getlabel(l2);
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+ objectlibrary.getlabel(l3);
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+ emit_const_reg(A_CMP,S_L,64,R_ECX);
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+ emitjmp(C_L,l1);
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+ emit_reg_reg(A_XOR,S_L,hregisterlow,hregisterlow);
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+ emit_reg_reg(A_XOR,S_L,hregisterhigh,hregisterhigh);
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+ cg.a_jmp_always(exprasmlist,l3);
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+ cg.a_label(exprasmlist,l1);
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+ emit_const_reg(A_CMP,S_L,32,R_ECX);
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+ emitjmp(C_L,l2);
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+ emit_const_reg(A_SUB,S_L,32,R_ECX);
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+ emit_reg_reg(A_SHL,S_L,R_CL,
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+ hregisterlow);
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+ emit_reg_reg(A_MOV,S_L,hregisterlow,hregisterhigh);
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+ emit_reg_reg(A_XOR,S_L,hregisterlow,hregisterlow);
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+ cg.a_jmp_always(exprasmlist,l3);
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+ cg.a_label(exprasmlist,l2);
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+ emit_reg_reg_reg(A_SHLD,S_L,R_CL,
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+ hregisterlow,hregisterhigh);
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+ emit_reg_reg(A_SHL,S_L,R_CL,
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+ hregisterlow);
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+ cg.a_label(exprasmlist,l3);
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+ end
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+ else
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+ begin
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+ objectlibrary.getlabel(l1);
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+ objectlibrary.getlabel(l2);
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+ objectlibrary.getlabel(l3);
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+ emit_const_reg(A_CMP,S_L,64,R_ECX);
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+ emitjmp(C_L,l1);
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+ emit_reg_reg(A_XOR,S_L,hregisterlow,hregisterlow);
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+ emit_reg_reg(A_XOR,S_L,hregisterhigh,hregisterhigh);
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+ cg.a_jmp_always(exprasmlist,l3);
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+ cg.a_label(exprasmlist,l1);
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+ emit_const_reg(A_CMP,S_L,32,R_ECX);
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+ emitjmp(C_L,l2);
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+ emit_const_reg(A_SUB,S_L,32,R_ECX);
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+ emit_reg_reg(A_SHR,S_L,R_CL,
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+ hregisterhigh);
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+ emit_reg_reg(A_MOV,S_L,hregisterhigh,hregisterlow);
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+ emit_reg_reg(A_XOR,S_L,hregisterhigh,hregisterhigh);
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+ cg.a_jmp_always(exprasmlist,l3);
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+ cg.a_label(exprasmlist,l2);
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+ emit_reg_reg_reg(A_SHRD,S_L,R_CL,
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+ hregisterhigh,hregisterlow);
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+ emit_reg_reg(A_SHR,S_L,R_CL,
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+ hregisterhigh);
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+ cg.a_label(exprasmlist,l3);
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+
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+ end;
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+
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+ { maybe put ECX back }
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+ if popecx then
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+ emit_reg(A_POP,S_L,R_ECX)
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+ else
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+ rg.ungetregisterint(exprasmlist,R_ECX);
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+
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+ location.registerlow:=hregisterlow;
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+ location.registerhigh:=hregisterhigh;
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+ end;
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+ end
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+ else
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+ begin
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+ { load left operators in a register }
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+ location_copy(location,left.location);
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+ location_force_reg(exprasmlist,location,OS_INT,false);
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+
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+ { shifting by a constant directly coded: }
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+ if (right.nodetype=ordconstn) then
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+ begin
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+ { l shl 32 should 0 imho, but neither TP nor Delphi do it in this way (FK)
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+ if right.value<=31 then
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+ }
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+ emit_const_reg(op,S_L,tordconstnode(right).value and 31,
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+ location.register);
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+ {
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+ else
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+ emit_reg_reg(A_XOR,S_L,hregister1,
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+ hregister1);
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+ }
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+ end
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+ else
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+ begin
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+ { load right operators in a register }
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+ if right.location.loc<>LOC_REGISTER then
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+ begin
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+ if right.location.loc<>LOC_CREGISTER then
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+ location_release(exprasmlist,right.location);
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+ hregister2:=rg.getexplicitregisterint(exprasmlist,R_ECX);
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+ cg.a_load_loc_reg(exprasmlist,right.location,hregister2);
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+ end
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+ else
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+ hregister2:=right.location.register;
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+
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+ { left operator is already in a register }
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+ { hence are both in a register }
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+ { is it in the case ECX ? }
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+ if (location.register=R_ECX) then
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+ begin
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+ { then only swap }
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+ emit_reg_reg(A_XCHG,S_L,location.register,hregister2);
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+ hregister3:=location.register;
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+ location.register:=hregister2;
|
|
|
+ hregister2:=hregister3;
|
|
|
+ end
|
|
|
+ { if second operator not in ECX ? }
|
|
|
+ else if (hregister2<>R_ECX) then
|
|
|
+ begin
|
|
|
+ { ECX occupied then push it }
|
|
|
+ if not (R_ECX in rg.unusedregsint) then
|
|
|
+ begin
|
|
|
+ popecx:=true;
|
|
|
+ emit_reg(A_PUSH,S_L,R_ECX);
|
|
|
+ end
|
|
|
+ else
|
|
|
+ rg.getexplicitregisterint(exprasmlist,R_ECX);
|
|
|
+ emit_reg_reg(A_MOV,S_L,hregister2,R_ECX);
|
|
|
+ end;
|
|
|
+ rg.ungetregisterint(exprasmlist,hregister2);
|
|
|
+ { right operand is in ECX }
|
|
|
+ emit_reg_reg(op,S_L,R_CL,location.register);
|
|
|
+ { maybe ECX back }
|
|
|
+ if popecx then
|
|
|
+ emit_reg(A_POP,S_L,R_ECX)
|
|
|
+ else
|
|
|
+ rg.ungetregisterint(exprasmlist,R_ECX);
|
|
|
+ end;
|
|
|
+ end;
|
|
|
+*)
|
|
|
+ end;
|
|
|
+
|
|
|
+
|
|
|
+
|
|
|
+{*****************************************************************************
|
|
|
+ TI386NOTNODE
|
|
|
+*****************************************************************************}
|
|
|
+
|
|
|
+ procedure tm68knotnode.pass_2;
|
|
|
+ const
|
|
|
+ flagsinvers : array[F_E..F_BE] of tresflags =
|
|
|
+ (F_NE,F_E,F_LE,F_GE,F_L,F_G,F_NC,F_C,
|
|
|
+ F_BE,F_B,F_AE,F_A);
|
|
|
+ var
|
|
|
+ hl : tasmlabel;
|
|
|
+ opsize : topsize;
|
|
|
+ begin
|
|
|
+ if is_boolean(resulttype.def) then
|
|
|
+ begin
|
|
|
+ opsize:=def_opsize(resulttype.def);
|
|
|
+ { the second pass could change the location of left }
|
|
|
+ { if it is a register variable, so we've to do }
|
|
|
+ { this before the case statement }
|
|
|
+ if left.location.loc<>LOC_JUMP then
|
|
|
+ secondpass(left);
|
|
|
+
|
|
|
+ case left.location.loc of
|
|
|
+ LOC_JUMP :
|
|
|
+ begin
|
|
|
+ location_reset(location,LOC_JUMP,OS_NO);
|
|
|
+ hl:=truelabel;
|
|
|
+ truelabel:=falselabel;
|
|
|
+ falselabel:=hl;
|
|
|
+ secondpass(left);
|
|
|
+ maketojumpbool(exprasmlist,left,lr_load_regvars);
|
|
|
+ hl:=truelabel;
|
|
|
+ truelabel:=falselabel;
|
|
|
+ falselabel:=hl;
|
|
|
+ end;
|
|
|
+ LOC_FLAGS :
|
|
|
+ begin
|
|
|
+ location_release(exprasmlist,left.location);
|
|
|
+ location_reset(location,LOC_FLAGS,OS_NO);
|
|
|
+ location.resflags:=flagsinvers[left.location.resflags];
|
|
|
+ end;
|
|
|
+ LOC_CONSTANT,
|
|
|
+ LOC_REGISTER,
|
|
|
+ LOC_CREGISTER,
|
|
|
+ LOC_REFERENCE,
|
|
|
+ LOC_CREFERENCE :
|
|
|
+ begin
|
|
|
+ location_force_reg(exprasmlist,left.location,def_cgsize(resulttype.def),true);
|
|
|
+ list.concat(taicpu.op_reg(A_TST,opsize,left.location.register));
|
|
|
+ location_release(exprasmlist,left.location);
|
|
|
+ location_reset(location,LOC_FLAGS,OS_NO);
|
|
|
+ location.resflags:=F_E;
|
|
|
+ end;
|
|
|
+ else
|
|
|
+ internalerror(200203224);
|
|
|
+ end;
|
|
|
+ end
|
|
|
+ else if is_64bitint(left.resulttype.def) then
|
|
|
+ begin
|
|
|
+ secondpass(left);
|
|
|
+ location_copy(location,left.location);
|
|
|
+ location_force_reg(exprasmlist,location,OS_64,false);
|
|
|
+ cg.a_op64_op_loc_reg(exprasmlist,A_NOT,OS_64,
|
|
|
+ location,joinreg64(l.registerlow,l.registerhigh));
|
|
|
+ end
|
|
|
+ else
|
|
|
+ begin
|
|
|
+ secondpass(left);
|
|
|
+ location_copy(location,left.location);
|
|
|
+ location_force_reg(exprasmlist,location,def_cgsize(resulttype.def),false);
|
|
|
+
|
|
|
+ opsize:=def_cgsize(resulttype.def);
|
|
|
+ cg.a_op_reg_reg(exprasmlist,OP_NOT,location.register,location.register);
|
|
|
+ end;
|
|
|
+ end;
|
|
|
+
|
|
|
+begin
|
|
|
+ cmoddivnode:=tm68kmoddivnode;
|
|
|
+ cshlshrnode:=tm68kshlshrnode;
|
|
|
+ cnotnode:=tm68knotnode;
|
|
|
+end.
|
|
|
+{
|
|
|
+ $Log$
|
|
|
+ Revision 1.1 2002-08-14 19:16:34 carl
|
|
|
+ + m68k type conversion nodes
|
|
|
+ + started some mathematical nodes
|
|
|
+ * out of bound references should now be handled correctly
|
|
|
+
|
|
|
+}
|
carl