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* arm/aarch64: patch by J. Gareth Moreton: fix register allocation information for Mov2None 2, should resolve #38055

git-svn-id: trunk@48235 -
florian 4 years ago
parent
commit
7a3eb453d4
1 changed files with 5 additions and 0 deletions
  1. 5 0
      compiler/armgen/aoptarm.pas

+ 5 - 0
compiler/armgen/aoptarm.pas

@@ -531,6 +531,11 @@ Implementation
                               { Instruction will become mov r1,r1 }
                               { Instruction will become mov r1,r1 }
                               DebugMsg('Peephole Optimization: Mov2None 2 done', next_hp);
                               DebugMsg('Peephole Optimization: Mov2None 2 done', next_hp);
 
 
+                              { Allocate r1 between the instructions; not doing
+                                so may cause problems when removing superfluous
+                                MOVs later (i38055) }
+                              AllocRegBetween(taicpu(p).oper[1]^.reg, p, next_hp, UsedRegs);
+
                               if (next_hp = hp1) then
                               if (next_hp = hp1) then
                                 { Don't let hp1 become a dangling pointer }
                                 { Don't let hp1 become a dangling pointer }
                                 hp1 := nil;
                                 hp1 := nil;