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* several fixes, small test units can be compiled

florian 23 years ago
parent
commit
7bf1321808

+ 7 - 4
compiler/x86_64/aasmcpu.pas

@@ -265,19 +265,19 @@ implementation
        { Intel style operands ! }
        { Intel style operands ! }
        opsize_2_type:array[0..2,topsize] of longint=(
        opsize_2_type:array[0..2,topsize] of longint=(
          (OT_NONE,
          (OT_NONE,
-          OT_BITS8,OT_BITS16,OT_BITS32,OT_BITS16,OT_BITS32,OT_BITS32,
+          OT_BITS8,OT_BITS16,OT_BITS32,OT_BITS16,OT_BITS32,OT_BITS32,OT_BITS64,OT_BITS64,OT_BITS64,
           OT_BITS16,OT_BITS32,OT_BITS64,
           OT_BITS16,OT_BITS32,OT_BITS64,
           OT_BITS32,OT_BITS64,OT_BITS80,OT_BITS64,OT_BITS64,OT_BITS64,
           OT_BITS32,OT_BITS64,OT_BITS80,OT_BITS64,OT_BITS64,OT_BITS64,
           OT_NEAR,OT_FAR,OT_SHORT
           OT_NEAR,OT_FAR,OT_SHORT
          ),
          ),
          (OT_NONE,
          (OT_NONE,
-          OT_BITS8,OT_BITS16,OT_BITS32,OT_BITS8,OT_BITS8,OT_BITS16,
+          OT_BITS8,OT_BITS16,OT_BITS32,OT_BITS8,OT_BITS8,OT_BITS16,OT_BITS8,OT_BITS16,OT_BITS32,
           OT_BITS16,OT_BITS32,OT_BITS64,
           OT_BITS16,OT_BITS32,OT_BITS64,
           OT_BITS32,OT_BITS64,OT_BITS80,OT_BITS64,OT_BITS64,OT_BITS64,
           OT_BITS32,OT_BITS64,OT_BITS80,OT_BITS64,OT_BITS64,OT_BITS64,
           OT_NEAR,OT_FAR,OT_SHORT
           OT_NEAR,OT_FAR,OT_SHORT
          ),
          ),
          (OT_NONE,
          (OT_NONE,
-          OT_BITS8,OT_BITS16,OT_BITS32,OT_NONE,OT_NONE,OT_NONE,
+          OT_BITS8,OT_BITS16,OT_BITS32,OT_NONE,OT_NONE,OT_NONE,OT_NONE,OT_NONE,OT_NONE,
           OT_BITS16,OT_BITS32,OT_BITS64,
           OT_BITS16,OT_BITS32,OT_BITS64,
           OT_BITS32,OT_BITS64,OT_BITS80,OT_BITS64,OT_BITS64,OT_BITS64,
           OT_BITS32,OT_BITS64,OT_BITS80,OT_BITS64,OT_BITS64,OT_BITS64,
           OT_NEAR,OT_FAR,OT_SHORT
           OT_NEAR,OT_FAR,OT_SHORT
@@ -1799,7 +1799,10 @@ implementation
 end.
 end.
 {
 {
   $Log$
   $Log$
-  Revision 1.1  2002-07-24 22:38:15  florian
+  Revision 1.2  2002-07-25 22:55:33  florian
+    * several fixes, small test units can be compiled
+
+  Revision 1.1  2002/07/24 22:38:15  florian
     + initial release of x86-64 target code
     + initial release of x86-64 target code
 
 
   Revision 1.1  2002/07/01 18:46:29  peter
   Revision 1.1  2002/07/01 18:46:29  peter

+ 5 - 3
compiler/x86_64/agx64att.pas

@@ -66,7 +66,7 @@ interface
        );
        );
 
 
      att_opsize2str : array[topsize] of string[2] = ('',
      att_opsize2str : array[topsize] of string[2] = ('',
-       'b','w','l','bw','bl','wl',
+       'b','w','l','bw','bl','wl','bq','wq','lq',
        's','l','q',
        's','l','q',
        's','l','t','d','q','v',
        's','l','t','d','q','v',
        '','',''
        '','',''
@@ -282,7 +282,9 @@ initialization
 end.
 end.
 {
 {
   $Log$
   $Log$
-  Revision 1.1  2002-07-24 22:38:15  florian
-    + initial release of x86-64 target code
+  Revision 1.2  2002-07-25 22:55:33  florian
+    * several fixes, small test units can be compiled
 
 
+  Revision 1.1  2002/07/24 22:38:15  florian
+    + initial release of x86-64 target code
 }
 }

+ 126 - 1
compiler/x86_64/cgcpu.pas

@@ -36,6 +36,7 @@ unit cgcpu;
 
 
     type
     type
       tcgx86_64 = class(tcgx86)
       tcgx86_64 = class(tcgx86)
+         procedure g_concatcopy(list : taasmoutput;const source,dest : treference;len : aword; delsource,loadref : boolean);override;
       end;
       end;
 
 
   implementation
   implementation
@@ -45,13 +46,137 @@ unit cgcpu;
        symdef,symsym,defbase,paramgr,
        symdef,symsym,defbase,paramgr,
        rgobj,tgobj,rgcpu;
        rgobj,tgobj,rgcpu;
 
 
+    procedure tcgx86_64.g_concatcopy(list : taasmoutput;const source,dest : treference;len : aword; delsource,loadref : boolean);
+      var
+         ecxpushed : boolean;
+         helpsize : longint;
+         i : byte;
+         reg8,reg32 : tregister;
+         srcref,dstref : treference;
+         swap : boolean;
+
+         procedure maybepushecx;
+         begin
+           if not(R_ECX in rg.unusedregsint) then
+             begin
+               list.concat(Taicpu.Op_reg(A_PUSH,S_L,R_ECX));
+               ecxpushed:=true;
+             end
+           else rg.getexplicitregisterint(list,R_ECX);
+         end;
+
+      begin
+         if (not loadref) and
+            ((len<=8) or
+             (not(cs_littlesize in aktglobalswitches ) and (len<=12))) then
+           begin
+              helpsize:=len shr 3;
+              rg.getexplicitregisterint(list,R_RDI);
+              dstref:=dest;
+              srcref:=source;
+              for i:=1 to helpsize do
+                begin
+                   a_load_ref_reg(list,OS_64,srcref,R_RDI);
+                   If (len=8) and delsource then
+                     reference_release(list,source);
+                   a_load_reg_ref(list,OS_64,R_RDI,dstref);
+                   inc(srcref.offset,8);
+                   inc(dstref.offset,8);
+                   dec(len,8);
+                end;
+              if len>1 then
+                begin
+                   a_load_ref_reg(list,OS_16,srcref,R_EDI);
+                   If (len =4) and delsource then
+                     reference_release(list,source);
+                   a_load_reg_ref(list,OS_16,R_EDI,dstref);
+                   inc(srcref.offset,4);
+                   inc(dstref.offset,4);
+                   dec(len,4);
+                end;
+              if len>1 then
+                begin
+                   a_load_ref_reg(list,OS_16,srcref,R_DI);
+                   If (len = 2) and delsource then
+                     reference_release(list,source);
+                   a_load_reg_ref(list,OS_16,R_DI,dstref);
+                   inc(srcref.offset,2);
+                   inc(dstref.offset,2);
+                   dec(len,2);
+                end;
+              if len>0 then
+                begin
+                   a_load_ref_reg(list,OS_16,srcref,R_DIL);
+                   a_load_reg_ref(list,OS_16,R_DIL,dstref);
+                end;
+              rg.ungetregisterint(list,R_RDI);
+           end
+         else
+           begin
+              rg.getexplicitregisterint(list,R_RDI);
+              a_loadaddr_ref_reg(list,dest,R_RDI);
+              list.concat(tai_regalloc.Alloc(R_RSI));
+              if loadref then
+                a_load_ref_reg(list,OS_ADDR,source,R_RSI)
+              else
+                begin
+                  a_loadaddr_ref_reg(list,source,R_RSI);
+                  if delsource then
+                    reference_release(list,source);
+                end;
+
+              list.concat(Taicpu.Op_none(A_CLD,S_NO));
+              ecxpushed:=false;
+              if cs_littlesize in aktglobalswitches  then
+                begin
+                   maybepushecx;
+                   a_load_const_reg(list,OS_INT,len,R_RCX);
+                   list.concat(Taicpu.Op_none(A_REP,S_NO));
+                   list.concat(Taicpu.Op_none(A_MOVSB,S_NO));
+                end
+              else
+                begin
+                   helpsize:=len shr 2;
+                   len:=len and 3;
+                   if helpsize>1 then
+                    begin
+                      maybepushecx;
+                      a_load_const_reg(list,OS_INT,helpsize,R_RCX);
+                      list.concat(Taicpu.Op_none(A_REP,S_NO));
+                    end;
+                   if helpsize>0 then
+                    list.concat(Taicpu.Op_none(A_MOVSD,S_NO));
+                   if len>1 then
+                     begin
+                        dec(len,2);
+                        list.concat(Taicpu.Op_none(A_MOVSW,S_NO));
+                     end;
+                   if len=1 then
+                     list.concat(Taicpu.Op_none(A_MOVSB,S_NO));
+                end;
+              rg.ungetregisterint(list,R_RDI);
+              list.concat(tai_regalloc.DeAlloc(R_RSI));
+              if ecxpushed then
+                list.concat(Taicpu.Op_reg(A_POP,S_L,R_RCX))
+              else
+                rg.ungetregisterint(list,R_RCX);
+
+              { loading SELF-reference again }
+              g_maybe_loadself(list);
+           end;
+         if delsource then
+          tg.ungetiftemp(list,source);
+      end;
 begin
 begin
   cg:=tcgx86_64.create;
   cg:=tcgx86_64.create;
   cg64:=tcg64f64.create;
   cg64:=tcg64f64.create;
 end.
 end.
 {
 {
   $Log$
   $Log$
-  Revision 1.1  2002-07-24 22:38:15  florian
+  Revision 1.2  2002-07-25 22:55:33  florian
+    * several fixes, small test units can be compiled
+
+  Revision 1.1  2002/07/24 22:38:15  florian
     + initial release of x86-64 target code
     + initial release of x86-64 target code
 
 
 }
 }

+ 17 - 14
compiler/x86_64/cpubase.pas

@@ -57,7 +57,7 @@ uses
 
 
 type
 type
   topsize = (S_NO,
   topsize = (S_NO,
-    S_B,S_W,S_L,S_BW,S_BL,S_WL,
+    S_B,S_W,S_L,S_BW,S_BL,S_WL,S_BQ,S_WQ,S_LQ,
     S_IS,S_IL,S_IQ,
     S_IS,S_IL,S_IQ,
     S_FS,S_FL,S_FX,S_D,S_Q,S_FV,
     S_FS,S_FL,S_FX,S_D,S_Q,S_FV,
     S_NEAR,S_FAR,S_SHORT
     S_NEAR,S_FAR,S_SHORT
@@ -395,12 +395,12 @@ const
       { the size of a vector register for a processor     }
       { the size of a vector register for a processor     }
       OS_VECTOR = OS_M64;
       OS_VECTOR = OS_M64;
 
 
-  cpuflags = [];
+      cpuflags = [];
 
 
-  { sizes }
-  pointersize   = 8;
-  extended_size = 10;
-  sizepostfix_pointer = S_L;
+      { sizes }
+      pointersize   = 8;
+      extended_size = 10;
+      sizepostfix_pointer = S_L;
 
 
 
 
 {*****************************************************************************
 {*****************************************************************************
@@ -409,18 +409,18 @@ const
 
 
        { location of function results }
        { location of function results }
 
 
-       stack_pointer_reg = R_ESP;
-       frame_pointer_reg = R_EBP;
-       self_pointer_reg  = R_ESI;
-       accumulator   = R_EAX;
-       accumulatorhigh = R_EDX;
+       stack_pointer_reg = R_RSP;
+       frame_pointer_reg = R_RBP;
+       self_pointer_reg  = R_RSI;
+       accumulator   = R_RAX;
+       accumulatorhigh = R_RDX;
        { the register where the vmt offset is passed to the destructor }
        { the register where the vmt offset is passed to the destructor }
        { helper routine                                                }
        { helper routine                                                }
-       vmt_offset_reg = R_EDI;
+       vmt_offset_reg = R_RDI;
 
 
        resultreg = R_RAX;
        resultreg = R_RAX;
        resultreg64 = R_RAX;
        resultreg64 = R_RAX;
-       fpuresultreg = R_ST;
+       fpu_result_reg = R_ST;
 
 
 {*****************************************************************************
 {*****************************************************************************
                        GCC /ABI linking information
                        GCC /ABI linking information
@@ -491,7 +491,10 @@ implementation
 end.
 end.
 {
 {
   $Log$
   $Log$
-  Revision 1.1  2002-07-24 22:38:15  florian
+  Revision 1.2  2002-07-25 22:55:33  florian
+    * several fixes, small test units can be compiled
+
+  Revision 1.1  2002/07/24 22:38:15  florian
     + initial release of x86-64 target code
     + initial release of x86-64 target code
 
 
 }
 }

+ 5 - 2
compiler/x86_64/cpuinfo.pas

@@ -22,7 +22,7 @@
 }
 }
 Unit cpuinfo;
 Unit cpuinfo;
 
 
-{$i defines.inc}
+{$i fpcdefs.inc}
 
 
 Interface
 Interface
 
 
@@ -56,7 +56,10 @@ Implementation
 end.
 end.
 {
 {
   $Log$
   $Log$
-  Revision 1.1  2002-07-24 22:38:15  florian
+  Revision 1.2  2002-07-25 22:55:34  florian
+    * several fixes, small test units can be compiled
+
+  Revision 1.1  2002/07/24 22:38:15  florian
     + initial release of x86-64 target code
     + initial release of x86-64 target code
 
 
 }
 }

+ 7 - 4
compiler/x86_64/cpunode.pas

@@ -25,15 +25,15 @@
 }
 }
 unit cpunode;
 unit cpunode;
 
 
-{$i defines.inc}
+{$i fpcdefs.inc}
 
 
   interface
   interface
 
 
   implementation
   implementation
 
 
     uses
     uses
-       ncgbas,ncgflw,ncgcnv,ncgmem,ncgcon
-       // n386ld,n386add,n386cal,n386con,n386flw,n386mat,n386mem,
+       ncgbas,ncgflw,ncgcnv,ncgmem,ncgcon,ncgld
+       // n386add,n386cal,n386con,n386flw,n386mat,n386mem,
        // n386set,n386inl,n386opt,
        // n386set,n386inl,n386opt,
        { this not really a node }
        { this not really a node }
        // n386obj
        // n386obj
@@ -42,7 +42,10 @@ unit cpunode;
 end.
 end.
 {
 {
   $Log$
   $Log$
-  Revision 1.1  2002-07-24 22:38:15  florian
+  Revision 1.2  2002-07-25 22:55:34  florian
+    * several fixes, small test units can be compiled
+
+  Revision 1.1  2002/07/24 22:38:15  florian
     + initial release of x86-64 target code
     + initial release of x86-64 target code
 
 
 }
 }

+ 6 - 3
compiler/x86_64/cputarg.pas

@@ -23,7 +23,7 @@
 { This unit includes the x86-64 dependent target units. }
 { This unit includes the x86-64 dependent target units. }
 unit cputarg;
 unit cputarg;
 
 
-{$i defines.inc}
+{$i fpcdefs.inc}
 
 
 interface
 interface
 
 
@@ -51,7 +51,7 @@ implementation
              Assemblers
              Assemblers
 **************************************}
 **************************************}
 
 
-    {$ifndef NOAG386ATT}
+    {$ifndef NOAGX86_64ATT}
       ,agx64att
       ,agx64att
     {$endif}
     {$endif}
 
 
@@ -62,7 +62,10 @@ implementation
 end.
 end.
 {
 {
   $Log$
   $Log$
-  Revision 1.1  2002-07-24 22:38:15  florian
+  Revision 1.2  2002-07-25 22:55:34  florian
+    * several fixes, small test units can be compiled
+
+  Revision 1.1  2002/07/24 22:38:15  florian
     + initial release of x86-64 target code
     + initial release of x86-64 target code
 
 
   Revision 1.2  2001/06/03 15:12:47  peter
   Revision 1.2  2001/06/03 15:12:47  peter

+ 5 - 2
compiler/x86_64/rax86dir.pas

@@ -22,7 +22,7 @@
 }
 }
 unit Rax86dir;
 unit Rax86dir;
 
 
-{$i defines.inc}
+{$i fpcdefs.inc}
 
 
 interface
 interface
 
 
@@ -303,7 +303,10 @@ initialization
 end.
 end.
 {
 {
   $Log$
   $Log$
-  Revision 1.1  2002-07-24 22:38:15  florian
+  Revision 1.2  2002-07-25 22:55:34  florian
+    * several fixes, small test units can be compiled
+
+  Revision 1.1  2002/07/24 22:38:15  florian
     + initial release of x86-64 target code
     + initial release of x86-64 target code
 
 
 }
 }

+ 57 - 11
compiler/x86_64/rgcpu.pas

@@ -84,51 +84,93 @@ unit rgcpu;
 {************************************************************************}
 {************************************************************************}
 {                         routine helpers                                }
 {                         routine helpers                                }
 {************************************************************************}
 {************************************************************************}
-{
+
   const
   const
+    reg2reg64 : array[tregister] of tregister = (R_NO,
+      R_RAX,R_RCX,R_RDX,R_RBX,R_RSP,R_RBP,R_RSI,R_RDI,
+      R_R8,R_R9,R_R10,R_R11,R_R12,R_R13,R_R14,R_R15,R_RIP,
+      R_RAX,R_RCX,R_RDX,R_RBX,R_RSP,R_RBP,R_RSI,R_RDI,
+      R_R8,R_R9,R_R10,R_R11,R_R12,R_R13,R_R14,R_R15,
+      R_RAX,R_RCX,R_RDX,R_RBX,R_RSP,R_RBP,R_RSI,R_RDI,
+      R_R8,R_R9,R_R10,R_R11,R_R12,R_R13,R_R14,R_R15,
+      R_RAX,R_RCX,R_RDX,R_RBX,R_RSP,R_RBP,R_RSI,R_RDI,
+      R_R8,R_R9,R_R10,R_R11,R_R12,R_R13,R_R14,R_R15,
+      R_NO,R_NO,R_NO,R_NO,
+      R_NO,R_NO,R_NO,R_NO,R_NO,R_NO,
+      R_NO,R_NO,R_NO,R_NO,R_NO,R_NO,R_NO,R_NO,R_NO,
+      R_NO,R_NO,R_NO,R_NO,R_NO,R_NO,
+      R_NO,R_NO,R_NO,R_NO,
+      R_NO,R_NO,R_NO,R_NO,R_NO,
+      R_NO,R_NO,R_NO,R_NO,R_NO,R_NO,R_NO,R_NO,
+      R_NO,R_NO,R_NO,R_NO,R_NO,R_NO,R_NO,R_NO,
+      R_NO,R_NO,R_NO,R_NO,R_NO,R_NO,R_NO,R_NO
+    );
+
     reg2reg32 : array[tregister] of tregister = (R_NO,
     reg2reg32 : array[tregister] of tregister = (R_NO,
       R_EAX,R_ECX,R_EDX,R_EBX,R_ESP,R_EBP,R_ESI,R_EDI,
       R_EAX,R_ECX,R_EDX,R_EBX,R_ESP,R_EBP,R_ESI,R_EDI,
+      R_R8D,R_R9D,R_R10D,R_R11D,R_R12D,R_R13D,R_R14D,R_R15D,R_NO,
+      R_EAX,R_ECX,R_EDX,R_EBX,R_ESP,R_EBP,R_ESI,R_EDI,
+      R_R8D,R_R9D,R_R10D,R_R11D,R_R12D,R_R13D,R_R14D,R_R15D,
+      R_EAX,R_ECX,R_EDX,R_EBX,R_ESP,R_EBP,R_ESI,R_EDI,
+      R_R8D,R_R9D,R_R10D,R_R11D,R_R12D,R_R13D,R_R14D,R_R15D,
       R_EAX,R_ECX,R_EDX,R_EBX,R_ESP,R_EBP,R_ESI,R_EDI,
       R_EAX,R_ECX,R_EDX,R_EBX,R_ESP,R_EBP,R_ESI,R_EDI,
-      R_EAX,R_ECX,R_EDX,R_EBX,R_NO,R_NO,R_NO,R_NO,
+      R_R8D,R_R9D,R_R10D,R_R11D,R_R12D,R_R13D,R_R14D,R_R15D,
+      R_NO,R_NO,R_NO,R_NO,
       R_NO,R_NO,R_NO,R_NO,R_NO,R_NO,
       R_NO,R_NO,R_NO,R_NO,R_NO,R_NO,
       R_NO,R_NO,R_NO,R_NO,R_NO,R_NO,R_NO,R_NO,R_NO,
       R_NO,R_NO,R_NO,R_NO,R_NO,R_NO,R_NO,R_NO,R_NO,
       R_NO,R_NO,R_NO,R_NO,R_NO,R_NO,
       R_NO,R_NO,R_NO,R_NO,R_NO,R_NO,
       R_NO,R_NO,R_NO,R_NO,
       R_NO,R_NO,R_NO,R_NO,
       R_NO,R_NO,R_NO,R_NO,R_NO,
       R_NO,R_NO,R_NO,R_NO,R_NO,
       R_NO,R_NO,R_NO,R_NO,R_NO,R_NO,R_NO,R_NO,
       R_NO,R_NO,R_NO,R_NO,R_NO,R_NO,R_NO,R_NO,
+      R_NO,R_NO,R_NO,R_NO,R_NO,R_NO,R_NO,R_NO,
       R_NO,R_NO,R_NO,R_NO,R_NO,R_NO,R_NO,R_NO
       R_NO,R_NO,R_NO,R_NO,R_NO,R_NO,R_NO,R_NO
     );
     );
+
     reg2reg16 : array[tregister] of tregister = (R_NO,
     reg2reg16 : array[tregister] of tregister = (R_NO,
       R_AX,R_CX,R_DX,R_BX,R_SP,R_BP,R_SI,R_DI,
       R_AX,R_CX,R_DX,R_BX,R_SP,R_BP,R_SI,R_DI,
+      R_R8W,R_R9W,R_R10W,R_R11W,R_R12W,R_R13W,R_R14W,R_R15W,R_NO,
+      R_AX,R_CX,R_DX,R_BX,R_SP,R_BP,R_SI,R_DI,
+      R_R8W,R_R9W,R_R10W,R_R11W,R_R12W,R_R13W,R_R14W,R_R15W,
       R_AX,R_CX,R_DX,R_BX,R_SP,R_BP,R_SI,R_DI,
       R_AX,R_CX,R_DX,R_BX,R_SP,R_BP,R_SI,R_DI,
-      R_AX,R_CX,R_DX,R_BX,R_NO,R_NO,R_NO,R_NO,
+      R_R8W,R_R9W,R_R10W,R_R11W,R_R12W,R_R13W,R_R14W,R_R15W,
+      R_AX,R_CX,R_DX,R_BX,R_SP,R_BP,R_SI,R_DI,
+      R_R8W,R_R9W,R_R10W,R_R11W,R_R12W,R_R13W,R_R14W,R_R15W,
+      R_NO,R_NO,R_NO,R_NO,
       R_NO,R_NO,R_NO,R_NO,R_NO,R_NO,
       R_NO,R_NO,R_NO,R_NO,R_NO,R_NO,
       R_NO,R_NO,R_NO,R_NO,R_NO,R_NO,R_NO,R_NO,R_NO,
       R_NO,R_NO,R_NO,R_NO,R_NO,R_NO,R_NO,R_NO,R_NO,
       R_NO,R_NO,R_NO,R_NO,R_NO,R_NO,
       R_NO,R_NO,R_NO,R_NO,R_NO,R_NO,
       R_NO,R_NO,R_NO,R_NO,
       R_NO,R_NO,R_NO,R_NO,
       R_NO,R_NO,R_NO,R_NO,R_NO,
       R_NO,R_NO,R_NO,R_NO,R_NO,
       R_NO,R_NO,R_NO,R_NO,R_NO,R_NO,R_NO,R_NO,
       R_NO,R_NO,R_NO,R_NO,R_NO,R_NO,R_NO,R_NO,
+      R_NO,R_NO,R_NO,R_NO,R_NO,R_NO,R_NO,R_NO,
       R_NO,R_NO,R_NO,R_NO,R_NO,R_NO,R_NO,R_NO
       R_NO,R_NO,R_NO,R_NO,R_NO,R_NO,R_NO,R_NO
     );
     );
+
     reg2reg8 : array[tregister] of tregister = (R_NO,
     reg2reg8 : array[tregister] of tregister = (R_NO,
-      R_AL,R_CL,R_DL,R_BL,R_NO,R_NO,R_NO,R_NO,
-      R_AL,R_CL,R_DL,R_BL,R_NO,R_NO,R_NO,R_NO,
-      R_AL,R_CL,R_DL,R_BL,R_NO,R_NO,R_NO,R_NO,
+      R_AL,R_CL,R_DL,R_BL,R_SPL,R_BPL,R_SIL,R_DIL,
+      R_R8B,R_R9B,R_R10B,R_R11B,R_R12B,R_R13B,R_R14B,R_R15B,R_NO,
+      R_AL,R_CL,R_DL,R_BL,R_SPL,R_BPL,R_SIL,R_DIL,
+      R_R8B,R_R9B,R_R10B,R_R11B,R_R12B,R_R13B,R_R14B,R_R15B,
+      R_AL,R_CL,R_DL,R_BL,R_SPL,R_BPL,R_SIL,R_DIL,
+      R_R8B,R_R9B,R_R10B,R_R11B,R_R12B,R_R13B,R_R14B,R_R15B,
+      R_AL,R_CL,R_DL,R_BL,R_SPL,R_BPL,R_SIL,R_DIL,
+      R_R8B,R_R9B,R_R10B,R_R11B,R_R12B,R_R13B,R_R14B,R_R15B,
+      R_NO,R_NO,R_NO,R_NO,
       R_NO,R_NO,R_NO,R_NO,R_NO,R_NO,
       R_NO,R_NO,R_NO,R_NO,R_NO,R_NO,
       R_NO,R_NO,R_NO,R_NO,R_NO,R_NO,R_NO,R_NO,R_NO,
       R_NO,R_NO,R_NO,R_NO,R_NO,R_NO,R_NO,R_NO,R_NO,
       R_NO,R_NO,R_NO,R_NO,R_NO,R_NO,
       R_NO,R_NO,R_NO,R_NO,R_NO,R_NO,
       R_NO,R_NO,R_NO,R_NO,
       R_NO,R_NO,R_NO,R_NO,
       R_NO,R_NO,R_NO,R_NO,R_NO,
       R_NO,R_NO,R_NO,R_NO,R_NO,
       R_NO,R_NO,R_NO,R_NO,R_NO,R_NO,R_NO,R_NO,
       R_NO,R_NO,R_NO,R_NO,R_NO,R_NO,R_NO,R_NO,
+      R_NO,R_NO,R_NO,R_NO,R_NO,R_NO,R_NO,R_NO,
       R_NO,R_NO,R_NO,R_NO,R_NO,R_NO,R_NO,R_NO
       R_NO,R_NO,R_NO,R_NO,R_NO,R_NO,R_NO,R_NO
     );
     );
-}
+
     { convert a register to a specfied register size }
     { convert a register to a specfied register size }
     function changeregsize(r:tregister;size:topsize):tregister;
     function changeregsize(r:tregister;size:topsize):tregister;
       var
       var
         reg : tregister;
         reg : tregister;
       begin
       begin
-        {
         case size of
         case size of
           S_B :
           S_B :
             reg:=reg2reg8[r];
             reg:=reg2reg8[r];
@@ -136,10 +178,11 @@ unit rgcpu;
             reg:=reg2reg16[r];
             reg:=reg2reg16[r];
           S_L :
           S_L :
             reg:=reg2reg32[r];
             reg:=reg2reg32[r];
+          S_Q :
+            reg:=reg2reg64[r];
           else
           else
-          }
             internalerror(200204101);
             internalerror(200204101);
-        // end;
+        end;
         if reg=R_NO then
         if reg=R_NO then
          internalerror(200204102);
          internalerror(200204102);
         changeregsize:=reg;
         changeregsize:=reg;
@@ -432,7 +475,10 @@ end.
 
 
 {
 {
   $Log$
   $Log$
-  Revision 1.1  2002-07-24 22:38:15  florian
+  Revision 1.2  2002-07-25 22:55:34  florian
+    * several fixes, small test units can be compiled
+
+  Revision 1.1  2002/07/24 22:38:15  florian
     + initial release of x86-64 target code
     + initial release of x86-64 target code
 
 
   Revision 1.8  2002/07/01 18:46:34  peter
   Revision 1.8  2002/07/01 18:46:34  peter