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@@ -33,6 +33,7 @@ unit rgcpu;
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type
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trgcpu = class(trgobj)
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+ procedure add_cpu_interferences(p : tai); override;
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procedure do_spill_read(list: TAsmList; pos: tai; const spilltemp: treference; tempreg: tregister; orgsupreg: tsuperregister); override;
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procedure do_spill_written(list: TAsmList; pos: tai; const spilltemp: treference; tempreg: tregister; orgsupreg: tsuperregister); override;
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function do_spill_replace(list : TAsmList;instr : tai_cpu_abstract_sym; orgreg : tsuperregister;const spilltemp : treference) : boolean; override;
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@@ -185,4 +186,25 @@ unit rgcpu;
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result:=true;
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end;
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+ procedure trgcpu.add_cpu_interferences(p : tai);
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+ begin
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+ if p.typ=ait_instruction then
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+ begin
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+ case taicpu(p).opcode of
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+ A_DIVUL,A_DIVSL,A_REMU,A_REMS:
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+ begin
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+ { for three operand opcodes, don't let the two 'destination' operands be the same register }
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+ if (regtype = R_INTREGISTER) and (taicpu(p).ops = 3) and
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+ (taicpu(p).oper[1]^.typ = top_reg) and
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+ (taicpu(p).oper[2]^.typ = top_reg) then
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+ begin
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+ add_edge(getsupreg(taicpu(p).oper[1]^.reg),getsupreg(taicpu(p).oper[2]^.reg));
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+ end;
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+ end
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+ else
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+ ;
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+ end;
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+ end;
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+ end;
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+
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end.
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