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@@ -140,7 +140,7 @@ end;
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*****************************************************************************}
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{
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Docs from uclib
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-
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+
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* We have a slight terminology confusion here. On the ARM, the register
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* we're interested in is actually the FPU status word - the FPU control
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* word is something different (which is implementation-defined and only
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@@ -212,6 +212,7 @@ end;
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}
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+{$if not(defined(gba)) and not(defined(nds))}
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const
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_FPU_MASK_IM = $00010000; { invalid operation }
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_FPU_MASK_ZM = $00020000; { divide by zero }
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@@ -231,6 +232,7 @@ procedure FPU_SetCW(cw : dword); nostackframe; assembler;
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asm
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wfs r0
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end;
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+{$endif}
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function GetRoundMode: TFPURoundingMode;
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@@ -261,26 +263,30 @@ function GetExceptionMask: TFPUExceptionMask;
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var
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cw : dword;
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begin
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+{$if not(defined(gba)) and not(defined(nds))}
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Result:=[];
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cw:=FPU_GetCW;
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-
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+
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if (cw and _FPU_MASK_IM)<>0 then
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include(Result,exInvalidOp);
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-
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+
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if (cw and _FPU_MASK_DM)<>0 then
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include(Result,exDenormalized);
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-
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+
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if (cw and _FPU_MASK_ZM)<>0 then
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include(Result,exZeroDivide);
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-
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+
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if (cw and _FPU_MASK_OM)<>0 then
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include(Result,exOverflow);
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-
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+
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if (cw and _FPU_MASK_UM)<>0 then
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include(Result,exUnderflow);
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-
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+
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if (cw and _FPU_MASK_PM)<>0 then
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- include(Result,exPrecision);
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+ include(Result,exPrecision);
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+{$else}
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+ dword(Result):=softfloat_exception_mask;
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+{$endif}
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end;
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@@ -288,27 +294,29 @@ function SetExceptionMask(const Mask: TFPUExceptionMask): TFPUExceptionMask;
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var
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cw : dword;
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begin
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+{$if not(defined(gba)) and not(defined(nds))}
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cw:=FPU_GetCW and not(_FPU_MASK_ALL);
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-
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+
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if exInvalidOp in Mask then
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cw:=cw or _FPU_MASK_IM;
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-
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+
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if exDenormalized in Mask then
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cw:=cw or _FPU_MASK_DM;
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-
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+
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if exZeroDivide in Mask then
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cw:=cw or _FPU_MASK_ZM;
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-
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+
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if exOverflow in Mask then
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cw:=cw or _FPU_MASK_OM;
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-
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+
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if exUnderflow in Mask then
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cw:=cw or _FPU_MASK_UM;
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-
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+
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if exPrecision in Mask then
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cw:=cw or _FPU_MASK_PM;
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-
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+
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FPU_SetCW(cw);
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+{$endif}
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softfloat_exception_mask:=dword(Mask);
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end;
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