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@@ -42,7 +42,8 @@ procedure set_fsr(fsr : dword);assembler;
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procedure fpc_cpuinit;
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begin
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{ enable div by 0 and invalid operation fpu exceptions }
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- set_fsr(get_fsr or $09000000);
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+ { round towards zero; ieee compliant arithmetics }
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+ set_fsr((get_fsr and $3fbfffff) or $09000000);
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end;
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@@ -352,7 +353,10 @@ end;
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{
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$Log$
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- Revision 1.16 2004-11-21 19:11:33 peter
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+ Revision 1.17 2005-01-18 20:37:26 florian
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+ * set floating point precision and ieee compliance
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+
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+ Revision 1.16 2004/11/21 19:11:33 peter
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* fix bootstrapping
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Revision 1.15 2004/11/21 15:35:23 peter
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florian