+ initial support for arm-freertos largely based on patch by Michael Ring

git-svn-id: trunk@44871 -

compiler/aggas.pas

@@ -199,7 +199,7 @@ implementation
            (atype<>sec_toc) and
            (atype<>sec_user) and
            { on embedded systems every byte counts, so smartlink bss too }
-           ((atype<>sec_bss) or (target_info.system in systems_embedded));
+           ((atype<>sec_bss) or (target_info.system in (systems_embedded+systems_freertos)));
       end;
 
     function TGNUAssembler.sectionname(atype:TAsmSectiontype;const aname:string;aorder:TAsmSectionOrder):string;

compiler/arm/agarmgas.pas

@@ -442,7 +442,7 @@ unit agarmgas;
             asmbin : 'as';
             asmcmd : '-o $OBJ $EXTRAOPT $ASM';
             supported_targets : [system_arm_linux,system_arm_netbsd,system_arm_wince,system_arm_gba,system_arm_palmos,system_arm_nds,
-                                 system_arm_embedded,system_arm_symbian,system_arm_android,system_arm_aros];
+                                 system_arm_embedded,system_arm_symbian,system_arm_android,system_arm_aros,system_arm_freertos];
             flags : [af_needar,af_smartlink_sections];
             labelprefix : '.L';
             comment : '# ';

compiler/arm/cpuelf.pas

@@ -974,7 +974,7 @@ implementation
          supported_targets : [system_arm_embedded,system_arm_darwin,
                               system_arm_linux,system_arm_netbsd,
                               system_arm_gba,system_arm_nds,
-                              system_arm_aros];
+                              system_arm_aros,system_arm_freertos];
          flags : [af_outputbinary,af_smartlink_sections,af_supports_dwarf];
          labelprefix : '.L';
          comment : '';

compiler/arm/cpuinfo.pas

@@ -347,6 +347,9 @@ Type
       ct_stm32f756xe,
       ct_stm32f756xg,
 
+      ct_stm32g071rb,
+      ct_nucleog071rb,
+
       { TI - Fury Class - 64 K Flash, 16 K SRAM Devices }
       ct_lm3s1110,
       ct_lm3s1133,
@@ -819,8 +822,8 @@ Const
       (controllertypestr:'STM32F401RD';     controllerunitstr:'STM32F401XX';      cputype:cpu_armv7em; fputype:fpu_soft; flashbase:$08000000; flashsize:$00060000; srambase:$20000000; sramsize:$00018000),
       (controllertypestr:'STM32F401VD';     controllerunitstr:'STM32F401XX';      cputype:cpu_armv7em; fputype:fpu_soft; flashbase:$08000000; flashsize:$00060000; srambase:$20000000; sramsize:$00018000),
       (controllertypestr:'STM32F401CE';     controllerunitstr:'STM32F401XX';      cputype:cpu_armv7em; fputype:fpu_soft; flashbase:$08000000; flashsize:$00080000; srambase:$20000000; sramsize:$00018000),
-      (controllertypestr:'STM32F401RE';     controllerunitstr:'STM32F401XX';      cputype:cpu_armv7em; fputype:fpu_soft; flashbase:$08000000; flashsize:$00080000; srambase:$20000000; sramsize:$00018000),
-      (controllertypestr:'NUCLEOF401RE';    controllerunitstr:'STM32F401XX';      cputype:cpu_armv7em; fputype:fpu_soft; flashbase:$08000000; flashsize:$00080000; srambase:$20000000; sramsize:$00018000),
+      (controllertypestr:'STM32F401RE';     controllerunitstr:'STM32F401XE';      cputype:cpu_armv7em; fputype:fpu_soft; flashbase:$08000000; flashsize:$00080000; srambase:$20000000; sramsize:$00018000),
+      (controllertypestr:'NUCLEOF401RE';    controllerunitstr:'STM32F401XE';      cputype:cpu_armv7em; fputype:fpu_soft; flashbase:$08000000; flashsize:$00080000; srambase:$20000000; sramsize:$00018000),
       (controllertypestr:'STM32F401VE';     controllerunitstr:'STM32F401XX';      cputype:cpu_armv7em; fputype:fpu_soft; flashbase:$08000000; flashsize:$00080000; srambase:$20000000; sramsize:$00018000),
       (controllertypestr:'STM32F407VG';     controllerunitstr:'STM32F407XX';      cputype:cpu_armv7em; fputype:fpu_soft; flashbase:$08000000; flashsize:$00100000; srambase:$20000000; sramsize:$00020000),
       (controllertypestr:'DISCOVERYF407VG'; controllerunitstr:'STM32F407XX';      cputype:cpu_armv7em; fputype:fpu_soft; flashbase:$08000000; flashsize:$00100000; srambase:$20000000; sramsize:$00020000),
@@ -870,6 +873,9 @@ Const
       (controllertypestr:'STM32F756XE';     controllerunitstr:'STM32F756';        cputype:cpu_armv7em; fputype:fpu_soft; flashbase:$08000000; flashsize:$00080000; srambase:$20010000; sramsize:$00040000),
       (controllertypestr:'STM32F756XG';     controllerunitstr:'STM32F756';        cputype:cpu_armv7em; fputype:fpu_soft; flashbase:$08000000; flashsize:$00100000; srambase:$20010000; sramsize:$00040000),
 
+      (controllertypestr:'STM32G071RB'         ; controllerunitstr:'STM32G071XX'         ; cputype:cpu_armv6m; fputype:fpu_soft; flashbase:$08000000; flashsize:$00020000; srambase:$20000000; sramsize:$00009000),
+      (controllertypestr:'NUCLEOG071RB'        ; controllerunitstr:'STM32G071XX'         ; cputype:cpu_armv6m; fputype:fpu_soft; flashbase:$08000000; flashsize:$00020000; srambase:$20000000; sramsize:$00009000),
+
       (controllertypestr:'LM3S1110';	controllerunitstr:'LM3FURY';	cputype:cpu_armv7m; fputype:fpu_soft; flashbase:$00000000;	flashsize:$00010000;	srambase:$20000000;	sramsize:$00004000),
       (controllertypestr:'LM3S1133';	controllerunitstr:'LM3FURY';	cputype:cpu_armv7m; fputype:fpu_soft; flashbase:$00000000;	flashsize:$00010000;	srambase:$20000000;	sramsize:$00004000),
       (controllertypestr:'LM3S1138';	controllerunitstr:'LM3FURY';	cputype:cpu_armv7m; fputype:fpu_soft; flashbase:$00000000;	flashsize:$00010000;	srambase:$20000000;	sramsize:$00004000),

compiler/arm/cputarg.pas

@@ -68,6 +68,10 @@ implementation
     {$ifndef NOTARGETAROS}
       ,t_aros
     {$endif}
+    {$ifndef NOTARGETFREERTOS}
+      ,t_freertos
+    {$endif}
+
 
 {**************************************
              Assemblers

compiler/options.pas

@@ -3940,7 +3940,7 @@ begin
     end;
 
   { Set up default value for the heap }
-  if target_info.system in systems_embedded then
+  if target_info.system in (systems_embedded+systems_freertos) then
     begin
       case target_info.system of
 {$ifdef AVR}
@@ -3950,6 +3950,11 @@ begin
           else
             heapsize:=128;
 {$endif AVR}
+        system_arm_freertos:
+          heapsize:=8192;
+        system_xtensa_freertos:
+          { keep default value }
+          ;
         system_arm_embedded:
           heapsize:=256;
         system_mipsel_embedded:

compiler/systems.inc

@@ -193,7 +193,8 @@
              system_x86_64_haiku,       { 102 }
              system_xtensa_embedded,    { 103 }
              system_xtensa_freertos,    { 104 }
-             system_xtensa_linux        { 105 }
+             system_xtensa_linux,       { 105 }
+             system_arm_freertos        { 106 }
        );
 
      type

compiler/systems.pas

@@ -305,7 +305,7 @@ interface
                            system_xtensa_embedded];
 
        { all FreeRTOS systems }
-       systems_freertos = [system_xtensa_freertos];
+       systems_freertos = [system_xtensa_freertos,system_arm_freertos];
 
        { all systems that allow section directive }
        systems_allow_section = systems_embedded;

compiler/systems/i_freertos.pas

@@ -718,6 +718,73 @@ unit i_freertos;
             llvmdatalayout : 'e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:64:128-a0:0:64-n32-S32';
           );
 
+       system_arm_freertos_info : tsysteminfo =
+          (
+            system       : system_arm_freertos;
+            name         : 'FreeRTOS';
+            shortname    : 'freertos';
+            flags        : [tf_needs_symbol_size,tf_files_case_sensitive,tf_requires_proper_alignment,
+                            tf_smartlink_sections,tf_init_final_units_by_calls];
+            cpu          : cpu_arm;
+            unit_env     : '';
+            extradefines : '';
+            exeext       : '';
+            defext       : '.def';
+            scriptext    : '.sh';
+            smartext     : '.sl';
+            unitext      : '.ppu';
+            unitlibext   : '.ppl';
+            asmext       : '.s';
+            objext       : '.o';
+            resext       : '.res';
+            resobjext    : '.or';
+            sharedlibext : '.so';
+            staticlibext : '.a';
+            staticlibprefix : 'libp';
+            sharedlibprefix : 'lib';
+            sharedClibext : '.so';
+            staticClibext : '.a';
+            staticClibprefix : 'lib';
+            sharedClibprefix : 'lib';
+            importlibprefix : 'libimp';
+            importlibext : '.a';
+            Cprefix      : '';
+            newline      : #10;
+            dirsep       : '/';
+            assem        : as_gas;
+            assemextern  : as_gas;
+            link         : ld_none;
+            linkextern   : ld_freertos;
+            ar           : ar_gnu_ar;
+            res          : res_none;
+            dbg          : dbg_dwarf2;
+            script       : script_unix;
+            endian       : endian_little;
+            alignment    :
+              (
+                procalign       : 4;
+                loopalign       : 4;
+                jumpalign       : 0;
+                jumpalignskipmax    : 0;
+                coalescealign   : 0;
+                coalescealignskipmax: 0;
+                constalignmin   : 0;
+                constalignmax   : 4;
+                varalignmin     : 0;
+                varalignmax     : 4;
+                localalignmin   : 4;
+                localalignmax   : 16;
+                recordalignmin  : 0;
+                recordalignmax  : 4;
+                maxCrecordalign : 4
+              );
+            first_parm_offset : 8;
+            stacksize    : 65536;
+            stackalign   : 16;
+            abi : abi_default;
+            llvmdatalayout : 'e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:64:128-a0:0:64-n32-S32';
+          );
+
  implementation
 
 initialization

compiler/systems/t_embed.pas

@@ -471,6 +471,9 @@ begin
       ct_stm32f756xe,
       ct_stm32f756xg,
 
+      ct_stm32g071rb,
+      ct_nucleog071rb,
+
       { TI - 64 K Flash, 16 K SRAM Devices }
       ct_lm3s1110,
       ct_lm3s1133,

compiler/systems/t_freertos.pas

@@ -222,479 +222,55 @@ begin
    end;
 
 {$ifdef ARM}
-  case current_settings.controllertype of
-      ct_none:
-           begin
-           end;
-      ct_lpc810m021fn8,
-      ct_lpc811m001fdh16,
-      ct_lpc812m101fdh16,
-      ct_lpc812m101fd20,
-      ct_lpc812m101fdh20,
-      ct_lpc1110fd20,
-      ct_lpc1111fdh20_002,
-      ct_lpc1111fhn33_101,
-      ct_lpc1111fhn33_102,
-      ct_lpc1111fhn33_103,
-      ct_lpc1111fhn33_201,
-      ct_lpc1111fhn33_202,
-      ct_lpc1111fhn33_203,
-      ct_lpc1112fd20_102,
-      ct_lpc1112fdh20_102,
-      ct_lpc1112fdh28_102,
-      ct_lpc1112fhn33_101,
-      ct_lpc1112fhn33_102,
-      ct_lpc1112fhn33_103,
-      ct_lpc1112fhn33_201,
-      ct_lpc1112fhn24_202,
-      ct_lpc1112fhn33_202,
-      ct_lpc1112fhn33_203,
-      ct_lpc1112fhi33_202,
-      ct_lpc1112fhi33_203,
-      ct_lpc1113fhn33_201,
-      ct_lpc1113fhn33_202,
-      ct_lpc1113fhn33_203,
-      ct_lpc1113fhn33_301,
-      ct_lpc1113fhn33_302,
-      ct_lpc1113fhn33_303,
-      ct_lpc1113bfd48_301,
-      ct_lpc1113bfd48_302,
-      ct_lpc1113bfd48_303,
-      ct_lpc1114fdh28_102,
-      ct_lpc1114fn28_102,
-      ct_lpc1114fhn33_201,
-      ct_lpc1114fhn33_202,
-      ct_lpc1114fhn33_203,
-      ct_lpc1114fhn33_301,
-      ct_lpc1114fhn33_302,
-      ct_lpc1114fhn33_303,
-      ct_lpc1114fhn33_333,
-      ct_lpc1114fhi33_302,
-      ct_lpc1114fhi33_303,
-      ct_lpc1114bfd48_301,
-      ct_lpc1114bfd48_302,
-      ct_lpc1114bfd48_303,
-      ct_lpc1114bfd48_323,
-      ct_lpc1114bfd48_333,
-      ct_lpc1115bfd48_303,
-      ct_lpc11c12fd48_301,
-      ct_lpc11c14fd48_301,
-      ct_lpc11c22fd48_301,
-      ct_lpc11c24fd48_301,
-      ct_lpc11d24fd48_301,
-      ct_lpc1224fbd48_101,
-      ct_lpc1224fbd48_121,
-      ct_lpc1224fbd64_101,
-      ct_lpc1224fbd64_121,
-      ct_lpc1225fbd48_301,
-      ct_lpc1225fbd48_321,
-      ct_lpc1225fbd64_301,
-      ct_lpc1225fbd64_321,
-      ct_lpc1226fbd48_301,
-      ct_lpc1226fbd64_301,
-      ct_lpc1227fbd48_301,
-      ct_lpc1227fbd64_301,
-      ct_lpc12d27fbd100_301,
-      ct_lpc1311fhn33,
-      ct_lpc1311fhn33_01,
-      ct_lpc1313fhn33,
-      ct_lpc1313fhn33_01,
-      ct_lpc1313fbd48,
-      ct_lpc1313fbd48_01,
-      ct_lpc1315fhn33,
-      ct_lpc1315fbd48,
-      ct_lpc1316fhn33,
-      ct_lpc1316fbd48,
-      ct_lpc1317fhn33,
-      ct_lpc1317fbd48,
-      ct_lpc1317fbd64,
-      ct_lpc1342fhn33,
-      ct_lpc1342fbd48,
-      ct_lpc1343fhn33,
-      ct_lpc1343fbd48,
-      ct_lpc1345fhn33,
-      ct_lpc1345fbd48,
-      ct_lpc1346fhn33,
-      ct_lpc1346fbd48,
-      ct_lpc1347fhn33,
-      ct_lpc1347fbd48,
-      ct_lpc1347fbd64,
-      ct_lpc2114,
-      ct_lpc2124,
-      ct_lpc2194,
-      ct_lpc1768,
-      ct_at91sam7s256,
-      ct_at91sam7se256,
-      ct_at91sam7x256,
-      ct_at91sam7xc256,
-
-      ct_stm32f030c6,
-      ct_stm32f030c8,
-      ct_stm32f030f4,
-      ct_stm32f030k6,
-      ct_stm32f030r8,
-      ct_stm32f050c4,
-      ct_stm32f050c6,
-      ct_stm32f050f4,
-      ct_stm32f050f6,
-      ct_stm32f050g4,
-      ct_stm32f050g6,
-      ct_stm32f050k4,
-      ct_stm32f050k6,
-      ct_stm32f051c4,
-      ct_stm32f051c6,
-      ct_stm32f051c8,
-      ct_stm32f051k4,
-      ct_stm32f051k6,
-      ct_stm32f051k8,
-      ct_stm32f051r4,
-      ct_stm32f051r6,
-      ct_stm32f051r8,
-
-      ct_stm32f091cc,
-      ct_stm32f091cb,
-      ct_stm32f091rc,
-      ct_stm32f091rb,
-      ct_stm32f091vc,
-      ct_stm32f091vb,
-
-      ct_stm32f100x4,
-      ct_stm32f100x6,
-      ct_stm32f100x8,
-      ct_stm32f100xB,
-      ct_stm32f100xC,
-      ct_stm32f100xD,
-      ct_stm32f100xE,
-      ct_stm32f101x4,
-      ct_stm32f101x6,
-      ct_stm32f101x8,
-      ct_stm32f101xB,
-      ct_stm32f101xC,
-      ct_stm32f101xD,
-      ct_stm32f101xE,
-      ct_stm32f101xF,
-      ct_stm32f101xG,
-      ct_stm32f102x4,
-      ct_stm32f102x6,
-      ct_stm32f102x8,
-      ct_stm32f102xB,
-      ct_stm32f103x4,
-      ct_stm32f103x6,
-      ct_stm32f103x8,
-      ct_stm32f103xB,
-      ct_stm32f103xC,
-      ct_stm32f103xD,
-      ct_stm32f103xE,
-      ct_stm32f103xF,
-      ct_stm32f103xG,
-      ct_stm32f107x8,
-      ct_stm32f107xB,
-      ct_stm32f107xC,
-      ct_stm32f105r8,
-      ct_stm32f105rb,
-      ct_stm32f105rc,
-      ct_stm32f105v8,
-      ct_stm32f105vb,
-      ct_stm32f105vc,
-      ct_stm32f107rb,
-      ct_stm32f107rc,
-      ct_stm32f107vb,
-      ct_stm32f107vc,
-      
-      ct_stm32f401cb,
-      ct_stm32f401rb,
-      ct_stm32f401vb,
-      ct_stm32f401cc,
-      ct_stm32f401rc,
-      ct_stm32f401vc,
-      ct_discoveryf401vc,
-      ct_stm32f401cd,
-      ct_stm32f401rd,
-      ct_stm32f401vd,
-      ct_stm32f401ce,
-      ct_stm32f401re,
-      ct_nucleof401re,
-      ct_stm32f401ve,
-      ct_stm32f407vg,
-      ct_discoveryf407vg,
-      ct_stm32f407ig,
-      ct_stm32f407zg,
-      ct_stm32f407ve,
-      ct_stm32f407ze,
-      ct_stm32f407ie,
-      ct_stm32f411cc,
-      ct_stm32f411rc,
-      ct_stm32f411vc,
-      ct_stm32f411ce,
-      ct_stm32f411re,
-      ct_nucleof411re,
-      ct_stm32f411ve,
-      ct_discoveryf411ve,
-      ct_stm32f429vg,
-      ct_stm32f429zg,
-      ct_stm32f429ig,
-      ct_stm32f429vi,
-      ct_stm32f429zi,
-      ct_discoveryf429zi,
-      ct_stm32f429ii,
-      ct_stm32f429ve,
-      ct_stm32f429ze,
-      ct_stm32f429ie,
-      ct_stm32f429bg,
-      ct_stm32f429bi,
-      ct_stm32f429be,
-      ct_stm32f429ng,
-      ct_stm32f429ni,
-      ct_stm32f429ne,
-      ct_stm32f446mc,
-      ct_stm32f446rc,
-      ct_stm32f446vc,
-      ct_stm32f446zc,
-      ct_stm32f446me,
-      ct_stm32f446re,
-      ct_nucleof446re,
-      ct_stm32f446ve,
-      ct_stm32f446ze,
-
-      ct_stm32f745xe,
-      ct_stm32f745xg,
-      ct_stm32f746xe,
-      ct_stm32f746xg,
-      ct_stm32f756xe,
-      ct_stm32f756xg,
-
-      { TI - 64 K Flash, 16 K SRAM Devices }
-      ct_lm3s1110,
-      ct_lm3s1133,
-      ct_lm3s1138,
-      ct_lm3s1150,
-      ct_lm3s1162,
-      ct_lm3s1165,
-      ct_lm3s1166,
-      ct_lm3s2110,
-      ct_lm3s2139,
-      ct_lm3s6100,
-      ct_lm3s6110,
-
-      { TI 128 K Flash, 32 K SRAM devices - Fury Class }
-      ct_lm3s1601,
-      ct_lm3s1608,
-      ct_lm3s1620,
-      ct_lm3s1635,
-      ct_lm3s1636,
-      ct_lm3s1637,
-      ct_lm3s1651,
-      ct_lm3s2601,
-      ct_lm3s2608,
-      ct_lm3s2620,
-      ct_lm3s2637,
-      ct_lm3s2651,
-      ct_lm3s6610,
-      ct_lm3s6611,
-      ct_lm3s6618,
-      ct_lm3s6633,
-      ct_lm3s6637,
-      ct_lm3s8630,
-
-      { TI 256 K Flase, 32 K SRAM devices - Fury Class }
-      ct_lm3s1911,
-      ct_lm3s1918,
-      ct_lm3s1937,
-      ct_lm3s1958,
-      ct_lm3s1960,
-      ct_lm3s1968,
-      ct_lm3s1969,
-      ct_lm3s2911,
-      ct_lm3s2918,
-      ct_lm3s2919,
-      ct_lm3s2939,
-      ct_lm3s2948,
-      ct_lm3s2950,
-      ct_lm3s2965,
-      ct_lm3s6911,
-      ct_lm3s6918,
-      ct_lm3s6938,
-      ct_lm3s6950,
-      ct_lm3s6952,
-      ct_lm3s6965,
-      ct_lm3s8930,
-      ct_lm3s8933,
-      ct_lm3s8938,
-      ct_lm3s8962,
-      ct_lm3s8970,
-      ct_lm3s8971,
-
-      { TI - Tempest Tempest - 256 K Flash, 64 K SRAM }
-      ct_lm3s5951,
-      ct_lm3s5956,
-      ct_lm3s1b21,
-      ct_lm3s2b93,
-      ct_lm3s5b91,
-      ct_lm3s9b81,
-      ct_lm3s9b90,
-      ct_lm3s9b92,
-      ct_lm3s9b95,
-      ct_lm3s9b96,
-      
-      ct_lm3s5d51,
-      
-      { TI - Stellaris something }
-      ct_lm4f120h5,
-      
-      { Infineon }
-      ct_xmc4500x1024,
-      ct_xmc4500x768,
-      ct_xmc4502x768,
-      ct_xmc4504x512,
-
-      { Allwinner }
-      ct_allwinner_a20,
-
-      { Freescale }
-      ct_mk20dx128vfm5,
-      ct_mk20dx128vft5,
-      ct_mk20dx128vlf5,
-      ct_mk20dx128vlh5,
-      ct_teensy30,
-      ct_mk20dx128vmp5,
-
-      ct_mk20dx32vfm5,
-      ct_mk20dx32vft5,
-      ct_mk20dx32vlf5,
-      ct_mk20dx32vlh5,
-      ct_mk20dx32vmp5,
-
-      ct_mk20dx64vfm5,
-      ct_mk20dx64vft5,
-      ct_mk20dx64vlf5,
-      ct_mk20dx64vlh5,
-      ct_mk20dx64vmp5,
-
-      ct_mk20dx128vlh7,
-      ct_mk20dx128vlk7,
-      ct_mk20dx128vll7,
-      ct_mk20dx128vmc7,
-
-      ct_mk20dx256vlh7,
-      ct_mk20dx256vlk7,
-      ct_mk20dx256vll7,
-      ct_mk20dx256vmc7,
-      ct_teensy31,
-      ct_teensy32,
-
-      ct_mk20dx64vlh7,
-      ct_mk20dx64vlk7,
-      ct_mk20dx64vmc7,
-
-      ct_mk22fn512cap12,
-      ct_mk22fn512cbp12,
-      ct_mk22fn512vdc12,
-      ct_mk22fn512vlh12,
-      ct_mk22fn512vll12,
-      ct_mk22fn512vmp12,
-      ct_freedom_k22f,
- 
-      { Atmel }
-      ct_sam3x8e,
-      ct_arduino_due,
-      ct_flip_n_click,
-      
-      { Nordic Semiconductor }
-      ct_nrf51422_xxaa,
-      ct_nrf51422_xxab,
-      ct_nrf51422_xxac,
-      ct_nrf51822_xxaa,
-      ct_nrf51822_xxab,
-      ct_nrf51822_xxac,
-      ct_nrf52832_xxaa,
-      ct_nrf52840_xxaa,
-      
-      ct_sc32442b,
-
-      { Raspberry Pi 2 }
-      ct_raspi2,
-
-      ct_thumb2bare:
-        begin
-         with embedded_controllers[current_settings.controllertype] do
-          with linkres do
-            begin
-              if (embedded_controllers[current_settings.controllertype].controllerunitstr='MK20D5')
-              or (embedded_controllers[current_settings.controllertype].controllerunitstr='MK20D7')
-              or (embedded_controllers[current_settings.controllertype].controllerunitstr='MK22F51212')
-              or (embedded_controllers[current_settings.controllertype].controllerunitstr='MK64F12') then
-                Add('ENTRY(_LOWLEVELSTART)')
-              else
-                Add('ENTRY(_START)');
-              Add('MEMORY');
-              Add('{');
-              if flashsize<>0 then
-                begin
-                  LinkStr := '    flash : ORIGIN = 0x' + IntToHex(flashbase,8)
-                    + ', LENGTH = 0x' + IntToHex(flashsize,8);
-                  Add(LinkStr);
-                end;
-
-              LinkStr := '    ram : ORIGIN = 0x' + IntToHex(srambase,8)
-              	+ ', LENGTH = 0x' + IntToHex(sramsize,8);
-              Add(LinkStr);
-
-              Add('}');
-              Add('_stack_top = 0x' + IntToHex(sramsize+srambase,8) + ';');
-    
-              // Add Checksum Calculation for LPC Controllers so that the bootloader starts the uploaded binary 
-              writeln(controllerunitstr);
-              if (controllerunitstr = 'LPC8xx') or (controllerunitstr = 'LPC11XX') or (controllerunitstr = 'LPC122X') then
-                Add('Startup_Checksum = 0 - (_stack_top + _START + 1 + NonMaskableInt_interrupt + 1 + Hardfault_interrupt + 1);');
-              if (controllerunitstr = 'LPC13XX') then
-                Add('Startup_Checksum = 0 - (_stack_top + _START + 1 + NonMaskableInt_interrupt + 1 + MemoryManagement_interrupt + 1 + BusFault_interrupt + 1 + UsageFault_interrupt + 1);');
-            end;
-        end
-    else
-      if not (cs_link_nolink in current_settings.globalswitches) then
-      	 internalerror(200902011);
-  end;
+  with embedded_controllers[current_settings.controllertype] do
+    with linkres do
+      begin
+        Add('ENTRY(_START)');
+        Add('MEMORY');
+        Add('{');
+        if flashsize<>0 then
+          begin
+            LinkStr := '    flash : ORIGIN = 0x' + IntToHex(flashbase,8)
+              + ', LENGTH = 0x' + IntToHex(flashsize,8);
+            Add(LinkStr);
+          end;
 
-  with linkres do
-    begin
-      Add('SECTIONS');
-      Add('{');
-      Add('     .text :');
-      Add('    {');
-      Add('    _text_start = .;');
-      Add('    KEEP(*(.init .init.*))');
-      if (embedded_controllers[current_settings.controllertype].controllerunitstr='MK20D5')
-         or (embedded_controllers[current_settings.controllertype].controllerunitstr='MK20D7')
-         or (embedded_controllers[current_settings.controllertype].controllerunitstr='MK22F51212')
-         or (embedded_controllers[current_settings.controllertype].controllerunitstr='MK64F12') then
-        begin
-          Add('    . = 0x400;');
-          Add('    KEEP(*(.flash_config *.flash_config.*))');
-        end;
-      Add('    *(.text .text.*)');
-      Add('    *(.strings)');
-      Add('    *(.rodata .rodata.*)');
-      Add('    *(.comment)');
-      Add('    . = ALIGN(4);');
-      Add('    _etext = .;');
-      if embedded_controllers[current_settings.controllertype].flashsize<>0 then
-        begin
-          Add('    } >flash');
-          Add('    .note.gnu.build-id : { *(.note.gnu.build-id) } >flash ');
-        end
-      else
-        begin
-          Add('    } >ram');
-          Add('    .note.gnu.build-id : { *(.note.gnu.build-id) } >ram ');
-        end;
+        LinkStr := '    ram : ORIGIN = 0x' + IntToHex(srambase,8)
+          + ', LENGTH = 0x' + IntToHex(sramsize,8);
+        Add(LinkStr);
+
+        Add('}');
+        Add('_stack_top = 0x' + IntToHex(sramsize+srambase,8) + ';');
+        Add('SECTIONS');
+        Add('{');
+        Add('    .text :');
+        Add('    {');
+        Add('    _text_start = .;');
+        Add('    KEEP(*(.init .init.*))');
+        Add('    *(.text .text.*)');
+        Add('    *(.strings)');
+        Add('    *(.rodata .rodata.*)');
+        Add('    *(.comment)');
+        Add('    . = ALIGN(4);');
+        Add('    _etext = .;');
+        if flashsize<>0 then
+          begin
+            Add('    } >flash');
+            Add('    .note.gnu.build-id : { *(.note.gnu.build-id) } >flash ');
+          end
+        else
+          begin
+            Add('    } >ram');
+            Add('    .note.gnu.build-id : { *(.note.gnu.build-id) } >ram ');
+          end;
 
-      Add('    .data :');
-      Add('    {');
-      Add('    _data = .;');
-      Add('    *(.data .data.*)');
-      Add('    KEEP (*(.fpc .fpc.n_version .fpc.n_links))');
-      Add('    _edata = .;');
-      if embedded_controllers[current_settings.controllertype].flashsize<>0 then
+        Add('    .data :');
+        Add('    {');
+        Add('    _data = .;');
+        Add('    *(.data .data.*)');
+        Add('    KEEP (*(.fpc .fpc.n_version .fpc.n_links))');
+        Add('    _edata = .;');
+      if flashsize<>0 then
         begin
           Add('    } >ram AT >flash');
         end
@@ -708,8 +284,8 @@ begin
       Add('    *(.bss .bss.*)');
       Add('    *(COMMON)');
       Add('    } >ram');
-      Add('. = ALIGN(4);');
-      Add('_bss_end = . ;');
+      Add('    . = ALIGN(4);');
+      Add('    _bss_end = . ;');
       Add('}');
       Add('_end = .;');
     end;
@@ -1804,8 +1380,8 @@ function TlinkerFreeRTOS.postprocessexecutable(const fn : string;isdll:boolean):
 
 initialization
 {$ifdef arm}
-  RegisterLinker(ld_freertos,TLinkerEmbedded);
-  RegisterTarget(system_arm_embedded_info);
+  RegisterLinker(ld_freertos,TlinkerFreeRTOS);
+  RegisterTarget(system_arm_freertos_info);
 {$endif arm}
 
 {$ifdef avr}

compiler/utils/ppuutils/ppudump.pp

@@ -223,7 +223,8 @@ const
   { 102 } 'Haiku-x86-64',
   { 103 } 'Embedded-Xtensa',
   { 104 } 'FreeRTos-Xtensa',
-  { 105 } 'Linux-Xtensa'
+  { 105 } 'Linux-Xtensa',
+  { 106 } 'FreeRTos-arm'
   );
 
 const

rtl/freertos/Makefile.fpc

@@ -73,11 +73,11 @@ CPU_SPECIFIC_COMMON_UNITS=
 ifeq ($(ARCH),arm)
 CPU_SPECIFIC_COMMON_UNITS=sysutils math classes fgl macpas typinfo types rtlconsts getopts lineinfo
 ifeq ($(SUBARCH),armv7m)
-CPU_UNITS=lm3fury lm3tempest stm32f10x_ld stm32f10x_md stm32f10x_hd stm32f10x_xl stm32f10x_conn stm32f10x_cl lpc13xx lpc1768 lm4f120 sam3x8e xmc4500 cortexm3 cortexm4 # thumb2_bare
+CPU_UNITS=stm32f103xe cortexm3 cortexm4 # thumb2_bare
 CPU_UNITS_DEFINED=1
 endif
 ifeq ($(SUBARCH),armv7em)
-CPU_UNITS=lm4f120 xmc4500 mk20d5 mk20d7 mk22f51212 mk64f12 stm32f401xx stm32f407xx stm32f411xe stm32f429xx stm32f446xx stm32f745 stm32f746 stm32f756 nrf52 cortexm3 cortexm4 cortexm7 # thumb2_bare
+CPU_UNITS=stm32f401xe cortexm3 cortexm4 cortexm7 # thumb2_bare
 CPU_UNITS_DEFINED=1
 endif
 ifeq ($(SUBARCH),armv4t)
@@ -89,7 +89,7 @@ CPU_UNITS=lpc21x4 at91sam7x256 sc32442b
 CPU_UNITS_DEFINED=1
 endif
 ifeq ($(SUBARCH),armv6m)
-CPU_UNITS=lpc8xx lpc11xx lpc122x stm32f0xx nrf51 cortexm0
+CPU_UNITS=stm32g071xx cortexm0
 CPU_UNITS_DEFINED=1
 endif
 ifeq ($(SUBARCH),armv7a)

utils/fpcm/fpcmake.ini

@@ -302,6 +302,13 @@ endif
 override FPCOPT+=-Cp$(SUBARCH)
 endif
 
+ifeq ($(FULL_TARGET),arm-freertos)
+ifeq ($(SUBARCH),)
+$(error When compiling for arm-freertos, a sub-architecture (e.g. SUBARCH=armv6m or SUBARCH=armv7em) must be defined)
+endif
+override FPCOPT+=-Cp$(SUBARCH)
+endif
+
 # Full name of the target, including CPU and OS. For OSs limited
 # to 8.3 we only use the target OS
 ifneq ($(findstring $(OS_SOURCE),$(LIMIT83fs)),)

utils/fpcm/fpcmmain.pp

@@ -155,7 +155,7 @@ interface
         {dragonfly} ( false, false, false, false, true,  false, false, false, false, false, false, false, false, false,   false, false, false, false, false, false,  false,   false),
         { win16 }   ( false, false, false, false, false, false, false, false, false, false, false, false, false, false,   false, true , false, false, false, false,  false,   false),
         { wasm }    ( false, false, false, false, false, false, false, false, false, false, false, false, false, false,   false, false, false, true,  false, false,  false,   false),
-        { freertos }( false, false, false, false, false, false, false, false, false, false, false, false, false, false,   false, false, false, false, false, false,  false,   true )
+        { freertos }( false, false, false, false, false, true,  false, false, false, false, false, false, false, false,   false, false, false, false, false, false,  false,   true )
       );
 
     type

utils/fpcm/revision.inc

@@ -1 +1 @@
-'2020-04-19 hash 9219aaf4db'
+'0 rev 0'