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* improve AndAnd2And optimization by checking if the first destination register is allocated after the second and

git-svn-id: trunk@22322 -
florian 13 years ago
parent
commit
93d0033282
1 changed files with 6 additions and 3 deletions
  1. 6 3
      compiler/arm/aoptcpu.pas

+ 6 - 3
compiler/arm/aoptcpu.pas

@@ -1017,22 +1017,25 @@ Implementation
                     {
                       change
                       and reg2,reg1,const1
-                      and reg2,reg2,const2
+                      and reg3,reg2,const2
                       to
-                      and reg2,reg1,(const1 and const2)
+                      and reg3,reg1,(const1 and const2)
                     }
                     if (taicpu(p).opcode = A_AND) and
                        (taicpu(p).oper[1]^.typ = top_reg) and
                        (taicpu(p).oper[2]^.typ = top_const) and
                        GetNextInstruction(p, hp1) and
                        MatchInstruction(hp1, A_AND, [taicpu(p).condition], [PF_None]) and
-                       MatchOperand(taicpu(hp1).oper[0]^, taicpu(p).oper[0]^.reg) and
+                       { either reg3 and reg2 are equal or reg2 is deallocated after the and }
+                       (MatchOperand(taicpu(hp1).oper[0]^, taicpu(p).oper[0]^.reg) or
+                        assigned(FindRegDealloc(taicpu(p).oper[0]^.reg,tai(hp1.Next)))) and
                        MatchOperand(taicpu(hp1).oper[1]^, taicpu(p).oper[0]^.reg) and
                        (taicpu(hp1).oper[2]^.typ = top_const) then
                       begin
                         DebugMsg('Peephole AndAnd2And done', p);
                         taicpu(p).loadConst(2,taicpu(p).oper[2]^.val and taicpu(hp1).oper[2]^.val);
                         taicpu(p).oppostfix:=taicpu(hp1).oppostfix;
+                        taicpu(p).loadReg(0,taicpu(hp1).oper[0]^.reg);
                         asml.remove(hp1);
                         hp1.free;
                       end;