* arm thumb supports only tst reg1,reg2

git-svn-id: trunk@23997 -

compiler/arm/narmset.pas

@@ -84,7 +84,7 @@ implementation
       begin
         location_reset(location,LOC_FLAGS,OS_NO);
         location.resflags:=F_NE;
-        if left.location.loc=LOC_CONSTANT then
+        if (left.location.loc=LOC_CONSTANT) and not(current_settings.cputype in cpu_thumb) then
           begin
             hlcg.location_force_reg(current_asmdata.CurrAsmList, right.location,
               right.resultdef, right.resultdef, true);
@@ -104,11 +104,20 @@ implementation
             hregister:=cg.getintregister(current_asmdata.CurrAsmList, uopsize);
             current_asmdata.CurrAsmList.concat(taicpu.op_reg_const(A_MOV,hregister,1));
 
-            shifterop_reset(so);
-            so.rs:=left.location.register;
-            so.shiftmode:=SM_LSL;
-            cg.a_reg_alloc(current_asmdata.CurrAsmList,NR_DEFAULTFLAGS);
-            current_asmdata.CurrAsmList.concat(taicpu.op_reg_reg_shifterop(A_TST,right.location.register,hregister,so));
+            if current_settings.cputype in cpu_thumb then
+              begin
+                current_asmdata.CurrAsmList.concat(taicpu.op_reg_reg(A_LSL,hregister,left.location.register));
+                cg.a_reg_alloc(current_asmdata.CurrAsmList,NR_DEFAULTFLAGS);
+                current_asmdata.CurrAsmList.concat(taicpu.op_reg_reg(A_TST,right.location.register,hregister));
+              end
+            else
+              begin
+                shifterop_reset(so);
+                so.rs:=left.location.register;
+                so.shiftmode:=SM_LSL;
+                cg.a_reg_alloc(current_asmdata.CurrAsmList,NR_DEFAULTFLAGS);
+                current_asmdata.CurrAsmList.concat(taicpu.op_reg_reg_shifterop(A_TST,right.location.register,hregister,so));
+              end;
           end;
       end;