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@@ -154,44 +154,58 @@
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cntlzw r11,r3 // count leading zeroes of msw1
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cntlzw r12,r5 // count leading zeroes of msw2
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subi r0,r7,1 // if no overflowcheck, r0 := $ffffffff, else r0 := 0;
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+ mr r10,r8
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add r9,r11,r12 // sum of leading zeroes
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or r0,r9,r0 // maximise sum if no overflow checking, otherwise it remains
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- cmplwi cr1,r0,63 // more than 63 leading zero bits in total? If so, no overflow
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+ cmplwi cr1,r0,64 // >= 64 leading zero bits in total? If so, no overflow
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beq .Lmsw_zero // if both msw's are zero, skip cross products
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mullw r7,r3,r6 // lsw of first cross-product
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add r8,r8,r7 // add
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- mullw r7,r4,r5 // lsw of second cross-product
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- add r8,r8,r7 // add
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+ mullw r5,r4,r5 // lsw of second cross-product
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+ add r8,r8,r5 // add
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.Lmsw_zero:
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- mullw r7,r4,r6 // lsw of product of lsw's
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- bge+ cr1,.LDone // if the sum of leading zero's >= 63 (or checkoverflow was 0)
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+ bge+ cr1,.LDone // if the sum of leading zero's >= 64 (or checkoverflow was 0)
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// there's no overflow, otherwise more thorough check
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- subfic r0,r11,31 // if msw f1 = 0, then r0 := -1, else r9 >= 0
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- cntlzw r4,r4 // get leading zeroes count of lsw f1
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+ subfic r0,r11,31 // if msw f1 = 0, then r0 := -1, else r0 >= 0
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+ cntlzw r3,r4 // get leading zeroes count of lsw f1
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srawi r0,r0,31 // if msw f1 = 0, then r0 := 1, else r0 := 0
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- subfic r10,r12,31 // same for f2
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- cntlzw r6,r6
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- srawi r10,r10,31
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- and r4,r4,r0 // if msw f1 <> 0, the leading zero count lsw f1 := 0
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- and r6,r6,r10 // same for f2
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- add r9,r9,r4 // add leading zero counts of lsw's to sum if appropriate
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- add r9,r9,r6
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- cmplwi r9,63 // is the sum now > 63?
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- bge .LDone
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+ subfic r11,r12,31 // same for f2
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+ cntlzw r12,r6
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+ srawi r11,r11,31
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+ and r3,r3,r0 // if msw f1 <> 0, the leading zero count lsw f1 := 0
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+ and r12,r12,r11 // same for f2
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+ add r9,r9,r3 // add leading zero counts of lsw's to sum if appropriate
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+ add r9,r9,r12
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+ cmplwi r9,64 // is the sum now >= 64?
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+ cmplwi cr1,r9,62 // or <= 62?
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+ bge+ .LDone // >= 64 leading zeroes -> no overflow
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+ ble+ cr1,.LOverflow // <= 62 leading zeroes -> overflow
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+ // for 63 zeroes, we need additional checks
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+ add r9,r7,r5 // sum of lsw's cross products can't produce a carry,
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+ // because the sum of leading zeroes is 63 -> at least
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+ // one of these cross products is 0
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+ li r0, 0
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+ addc r9,r9,r10 // add the msw of the product of the lsw's
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+ addze. r0,r0
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+ beq+ .LDone
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+ .LOverflow:
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b FPC_OVERFLOW
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.LDone:
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+ mullw r4,r4,r6 // lsw of product of lsw's
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mr r3,r8 // get msw of product in correct register
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- mr r4,r7 // get lsw of product in correct register
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end;
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{
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$Log$
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- Revision 1.3 2004-01-12 21:35:51 jonas
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+ Revision 1.4 2004-05-29 21:35:54 jonas
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+ * fixed overflow checking for qword multiplication
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+
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+ Revision 1.3 2004/01/12 21:35:51 jonas
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+ assembler FPC_MUL_QWORD routine
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Revision 1.2 2004/01/12 18:03:30 jonas
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- + ppc implemetnation of fpc_mod/div_qword (from ppc compiler writers guide)
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+ + ppc implementation of fpc_mod/div_qword (from ppc compiler writers guide)
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Revision 1.1 2003/09/14 11:34:13 peter
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* moved int64 asm code to int64p.inc
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Jonas Maebe