* some x86-64 compilation fixe

compiler/globals.pas

@@ -1718,16 +1718,16 @@ implementation
         initfputype:=fpu_fpa;
 {$endif arm}
 {$ifdef x86_64}
-        initoptprocessor:=ClassDefault;
-        initspecificoptprocessor:=ClassDefault;
+        initoptprocessor:=ClassAthlon64;
+        initspecificoptprocessor:=ClassAthlon64;
 
-        initfputype:=fpu_standard;
+        initfputype:=fpu_sse2;
 
         initpackenum:=4;
         {$IFDEF testvarsets}
         initsetalloc:=0;
         {$ENDIF}
-        initasmmode:=asmmode_direct;
+        initasmmode:=asmmode_x8664_gas;
 {$endif x86_64}
         initinterfacetype:=it_interfacecom;
         initdefproccall:=pocall_default;
@@ -1744,7 +1744,10 @@ implementation
 end.
 {
   $Log$
-  Revision 1.116  2003-11-30 19:35:29  florian
+  Revision 1.117  2003-12-20 12:38:51  florian
+    * some x86-64 compilation fixe
+
+  Revision 1.116  2003/11/30 19:35:29  florian
     * fixed several arm related problems
 
   Revision 1.115  2003/11/12 16:05:39  florian

compiler/ncal.pas

@@ -2460,6 +2460,11 @@ type
               if (procdefinition.proccalloption=pocall_inline) then
                 begin
                    current_procinfo.flags:=current_procinfo.flags+((procdefinition as tprocdef).inlininginfo^.flags*inherited_inlining_flags);
+                   {
+                   writeln(longint(current_procinfo.flags));
+                   writeln(longint(inherited_inlining_flags));
+                   writeln(longint((procdefinition as tprocdef).inlininginfo^.flags));
+                   }
                    if assigned(methodpointer) then
                      CGMessage(cg_e_unable_inline_object_methods);
                    if assigned(right) then
@@ -2699,7 +2704,10 @@ begin
 end.
 {
   $Log$
-  Revision 1.214  2003-12-16 22:09:31  florian
+  Revision 1.215  2003-12-20 12:38:51  florian
+    * some x86-64 compilation fixe
+
+  Revision 1.214  2003/12/16 22:09:31  florian
     * better inheritence of procinfo flags of inlined procedures
 
   Revision 1.213  2003/12/16 21:29:24  florian

compiler/systems.pas

@@ -72,6 +72,7 @@ interface
             ,asmmode_ppc_motorola
             ,asmmode_arm_gas
             ,asmmode_sparc_gas
+            ,asmmode_x8664_gas
        );
 
      (* IMPORTANT NOTE:
@@ -649,7 +650,10 @@ finalization
 end.
 {
   $Log$
-  Revision 1.74  2003-11-29 15:53:06  florian
+  Revision 1.75  2003-12-20 12:38:51  florian
+    * some x86-64 compilation fixe
+
+  Revision 1.74  2003/11/29 15:53:06  florian
     + nasmelf mode for BeOS
     + DQWORD directive in intel assembler mode
 

compiler/x86_64/cpuinfo.pas

@@ -26,6 +26,9 @@ Unit cpuinfo;
 
 Interface
 
+  uses
+    globtype;
+
 Type
    AWord = QWord;
    PAWord = ^AWord;
@@ -52,17 +55,12 @@ Type
 
    tprocessors =
       (no_processor,
-       ClassDefault
+       ClassAthlon64
       );
 
    tfputype =
      (no_fpuprocessor,
-      fpu_soft,
-      fpu_standard,
-      fpu_x87,
-      fpu_sse,
-      fpu_sse2,
-      fpu_sse3
+      fpu_sse2
      );
 
 Const
@@ -82,12 +80,36 @@ Const
    jmp_buf_size = 48;
 
 
+   { calling conventions supported by the code generator }
+   supported_calling_conventions = [
+     pocall_internproc,
+     pocall_compilerproc,
+     pocall_inline,
+     pocall_register,
+     pocall_safecall,
+     pocall_stdcall,
+     pocall_cdecl,
+     pocall_cppdecl
+   ];
+
+   processorsstr : array[tprocessors] of string[10] = ('',
+     'ATHLON64'
+   );
+
+   fputypestr : array[tfputype] of string[6] = ('',
+     'SSE2'
+   );
+
+
 Implementation
 
 end.
 {
   $Log$
-  Revision 1.7  2003-09-24 17:12:02  florian
+  Revision 1.8  2003-12-20 12:38:51  florian
+    * some x86-64 compilation fixe
+
+  Revision 1.7  2003/09/24 17:12:02  florian
     * several fixes for new reg allocator
 
   Revision 1.6  2003/01/05 13:36:54  florian

compiler/x86_64/r8664con.inc

@@ -1,124 +1,124 @@
 { don't edit, this file is generated from x86reg.dat }
-NR_NO = $00000000;
-NR_AL = $01010000;
-NR_AH = $01020000;
-NR_AX = $01030000;
-NR_EAX = $01040000;
-NR_RAX = $01050000;
-NR_CL = $01010001;
-NR_CH = $01020001;
-NR_CX = $01030001;
-NR_ECX = $01040001;
-NR_RCX = $01050001;
-NR_DL = $01010002;
-NR_DH = $01020002;
-NR_DX = $01030002;
-NR_EDX = $01040002;
-NR_RDX = $01050002;
-NR_BL = $01010003;
-NR_BH = $01020003;
-NR_BX = $01030003;
-NR_EBX = $01040003;
-NR_RBX = $01050003;
-NR_SIL = $01010004;
-NR_SI = $01030004;
-NR_ESI = $01040004;
-NR_RSI = $01050004;
-NR_DIL = $01010005;
-NR_DI = $01030005;
-NR_EDI = $01040005;
-NR_RDI = $01050005;
-NR_BPL = $01010006;
-NR_BP = $01030006;
-NR_EBP = $01040006;
-NR_RBP = $01050006;
-NR_SPL = $01010007;
-NR_SP = $01030007;
-NR_ESP = $01040007;
-NR_RSP = $01050007;
-NR_R8 = $01050008;
-NR_R8L = $01010008;
-NR_R8W = $01030008;
-NR_R8D = $01040008;
-NR_R9 = $01050009;
-NR_R9L = $01010009;
-NR_R9W = $01030009;
-NR_R9D = $01040009;
-NR_R10 = $0105000a;
-NR_R10L = $0101000a;
-NR_R10W = $0103000a;
-NR_R10D = $0104000a;
-NR_R11 = $0105000b;
-NR_R11L = $0101000b;
-NR_R11W = $0103000b;
-NR_R11D = $0104000b;
-NR_R12 = $0105000c;
-NR_R12L = $0101000c;
-NR_R12W = $0103000c;
-NR_R12D = $0104000c;
-NR_R13 = $0105000d;
-NR_R13L = $0101000d;
-NR_R13W = $0103000d;
-NR_R13D = $0104000d;
-NR_R14 = $0105000e;
-NR_R14L = $0101000e;
-NR_R14W = $0103000e;
-NR_R14D = $0104000e;
-NR_R15 = $0105000f;
-NR_R15L = $0101000f;
-NR_R15W = $0103000f;
-NR_R15D = $0104000f;
-NR_CS = $05000001;
-NR_DS = $05000002;
-NR_ES = $05000003;
-NR_SS = $05000004;
-NR_FS = $05000005;
-NR_GS = $05000006;
-NR_DR0 = $05000007;
-NR_DR1 = $05000008;
-NR_DR2 = $05000009;
-NR_DR3 = $0500000a;
-NR_DR6 = $0500000b;
-NR_DR7 = $0500000c;
-NR_CR0 = $0500000d;
-NR_CR2 = $0500000e;
-NR_CR3 = $0500000f;
-NR_CR4 = $05000010;
-NR_TR3 = $05000011;
-NR_TR4 = $05000012;
-NR_TR5 = $05000013;
-NR_TR6 = $05000014;
-NR_TR7 = $05000015;
-NR_ST0 = $02000000;
-NR_ST1 = $02000001;
-NR_ST2 = $02000002;
-NR_ST3 = $02000003;
-NR_ST4 = $02000004;
-NR_ST5 = $02000005;
-NR_ST6 = $02000006;
-NR_ST7 = $02000007;
-NR_ST = $02000008;
-NR_MM0 = $03000000;
-NR_MM1 = $03000001;
-NR_MM2 = $03000002;
-NR_MM3 = $03000003;
-NR_MM4 = $03000004;
-NR_MM5 = $03000005;
-NR_MM6 = $03000006;
-NR_MM7 = $03000007;
-NR_XMM0 = $04000000;
-NR_XMM1 = $04000001;
-NR_XMM2 = $04000002;
-NR_XMM3 = $04000003;
-NR_XMM4 = $04000004;
-NR_XMM5 = $04000005;
-NR_XMM6 = $04000006;
-NR_XMM7 = $04000007;
-NR_XMM8 = $04000008;
-NR_XMM9 = $04000009;
-NR_XMM10 = $0400000a;
-NR_XMM11 = $0400000b;
-NR_XMM12 = $0400000c;
-NR_XMM13 = $0400000d;
-NR_XMM14 = $0400000e;
-NR_XMM15 = $0400000f;
+NR_NO = tregister($00000000);
+NR_AL = tregister($01010000);
+NR_AH = tregister($01020000);
+NR_AX = tregister($01030000);
+NR_EAX = tregister($01040000);
+NR_RAX = tregister($01050000);
+NR_CL = tregister($01010001);
+NR_CH = tregister($01020001);
+NR_CX = tregister($01030001);
+NR_ECX = tregister($01040001);
+NR_RCX = tregister($01050001);
+NR_DL = tregister($01010002);
+NR_DH = tregister($01020002);
+NR_DX = tregister($01030002);
+NR_EDX = tregister($01040002);
+NR_RDX = tregister($01050002);
+NR_BL = tregister($01010003);
+NR_BH = tregister($01020003);
+NR_BX = tregister($01030003);
+NR_EBX = tregister($01040003);
+NR_RBX = tregister($01050003);
+NR_SIL = tregister($01010004);
+NR_SI = tregister($01030004);
+NR_ESI = tregister($01040004);
+NR_RSI = tregister($01050004);
+NR_DIL = tregister($01010005);
+NR_DI = tregister($01030005);
+NR_EDI = tregister($01040005);
+NR_RDI = tregister($01050005);
+NR_BPL = tregister($01010006);
+NR_BP = tregister($01030006);
+NR_EBP = tregister($01040006);
+NR_RBP = tregister($01050006);
+NR_SPL = tregister($01010007);
+NR_SP = tregister($01030007);
+NR_ESP = tregister($01040007);
+NR_RSP = tregister($01050007);
+NR_R8 = tregister($01050008);
+NR_R8L = tregister($01010008);
+NR_R8W = tregister($01030008);
+NR_R8D = tregister($01040008);
+NR_R9 = tregister($01050009);
+NR_R9L = tregister($01010009);
+NR_R9W = tregister($01030009);
+NR_R9D = tregister($01040009);
+NR_R10 = tregister($0105000a);
+NR_R10L = tregister($0101000a);
+NR_R10W = tregister($0103000a);
+NR_R10D = tregister($0104000a);
+NR_R11 = tregister($0105000b);
+NR_R11L = tregister($0101000b);
+NR_R11W = tregister($0103000b);
+NR_R11D = tregister($0104000b);
+NR_R12 = tregister($0105000c);
+NR_R12L = tregister($0101000c);
+NR_R12W = tregister($0103000c);
+NR_R12D = tregister($0104000c);
+NR_R13 = tregister($0105000d);
+NR_R13L = tregister($0101000d);
+NR_R13W = tregister($0103000d);
+NR_R13D = tregister($0104000d);
+NR_R14 = tregister($0105000e);
+NR_R14L = tregister($0101000e);
+NR_R14W = tregister($0103000e);
+NR_R14D = tregister($0104000e);
+NR_R15 = tregister($0105000f);
+NR_R15L = tregister($0101000f);
+NR_R15W = tregister($0103000f);
+NR_R15D = tregister($0104000f);
+NR_CS = tregister($05000001);
+NR_DS = tregister($05000002);
+NR_ES = tregister($05000003);
+NR_SS = tregister($05000004);
+NR_FS = tregister($05000005);
+NR_GS = tregister($05000006);
+NR_DR0 = tregister($05000007);
+NR_DR1 = tregister($05000008);
+NR_DR2 = tregister($05000009);
+NR_DR3 = tregister($0500000a);
+NR_DR6 = tregister($0500000b);
+NR_DR7 = tregister($0500000c);
+NR_CR0 = tregister($0500000d);
+NR_CR2 = tregister($0500000e);
+NR_CR3 = tregister($0500000f);
+NR_CR4 = tregister($05000010);
+NR_TR3 = tregister($05000011);
+NR_TR4 = tregister($05000012);
+NR_TR5 = tregister($05000013);
+NR_TR6 = tregister($05000014);
+NR_TR7 = tregister($05000015);
+NR_ST0 = tregister($02000000);
+NR_ST1 = tregister($02000001);
+NR_ST2 = tregister($02000002);
+NR_ST3 = tregister($02000003);
+NR_ST4 = tregister($02000004);
+NR_ST5 = tregister($02000005);
+NR_ST6 = tregister($02000006);
+NR_ST7 = tregister($02000007);
+NR_ST = tregister($02000008);
+NR_MM0 = tregister($03000000);
+NR_MM1 = tregister($03000001);
+NR_MM2 = tregister($03000002);
+NR_MM3 = tregister($03000003);
+NR_MM4 = tregister($03000004);
+NR_MM5 = tregister($03000005);
+NR_MM6 = tregister($03000006);
+NR_MM7 = tregister($03000007);
+NR_XMM0 = tregister($04000000);
+NR_XMM1 = tregister($04000001);
+NR_XMM2 = tregister($04000002);
+NR_XMM3 = tregister($04000003);
+NR_XMM4 = tregister($04000004);
+NR_XMM5 = tregister($04000005);
+NR_XMM6 = tregister($04000006);
+NR_XMM7 = tregister($04000007);
+NR_XMM8 = tregister($04000008);
+NR_XMM9 = tregister($04000009);
+NR_XMM10 = tregister($0400000a);
+NR_XMM11 = tregister($0400000b);
+NR_XMM12 = tregister($0400000c);
+NR_XMM13 = tregister($0400000d);
+NR_XMM14 = tregister($0400000e);
+NR_XMM15 = tregister($0400000f);

compiler/x86_64/r8664num.inc

@@ -1,124 +1,124 @@
 { don't edit, this file is generated from x86reg.dat }
-$00000000,
-$01010000,
-$01020000,
-$01030000,
-$01040000,
-$01050000,
-$01010001,
-$01020001,
-$01030001,
-$01040001,
-$01050001,
-$01010002,
-$01020002,
-$01030002,
-$01040002,
-$01050002,
-$01010003,
-$01020003,
-$01030003,
-$01040003,
-$01050003,
-$01010004,
-$01030004,
-$01040004,
-$01050004,
-$01010005,
-$01030005,
-$01040005,
-$01050005,
-$01010006,
-$01030006,
-$01040006,
-$01050006,
-$01010007,
-$01030007,
-$01040007,
-$01050007,
-$01050008,
-$01010008,
-$01030008,
-$01040008,
-$01050009,
-$01010009,
-$01030009,
-$01040009,
-$0105000a,
-$0101000a,
-$0103000a,
-$0104000a,
-$0105000b,
-$0101000b,
-$0103000b,
-$0104000b,
-$0105000c,
-$0101000c,
-$0103000c,
-$0104000c,
-$0105000d,
-$0101000d,
-$0103000d,
-$0104000d,
-$0105000e,
-$0101000e,
-$0103000e,
-$0104000e,
-$0105000f,
-$0101000f,
-$0103000f,
-$0104000f,
-$05000001,
-$05000002,
-$05000003,
-$05000004,
-$05000005,
-$05000006,
-$05000007,
-$05000008,
-$05000009,
-$0500000a,
-$0500000b,
-$0500000c,
-$0500000d,
-$0500000e,
-$0500000f,
-$05000010,
-$05000011,
-$05000012,
-$05000013,
-$05000014,
-$05000015,
-$02000000,
-$02000001,
-$02000002,
-$02000003,
-$02000004,
-$02000005,
-$02000006,
-$02000007,
-$02000008,
-$03000000,
-$03000001,
-$03000002,
-$03000003,
-$03000004,
-$03000005,
-$03000006,
-$03000007,
-$04000000,
-$04000001,
-$04000002,
-$04000003,
-$04000004,
-$04000005,
-$04000006,
-$04000007,
-$04000008,
-$04000009,
-$0400000a,
-$0400000b,
-$0400000c,
-$0400000d,
-$0400000e,
-$0400000f
+tregister($00000000),
+tregister($01010000),
+tregister($01020000),
+tregister($01030000),
+tregister($01040000),
+tregister($01050000),
+tregister($01010001),
+tregister($01020001),
+tregister($01030001),
+tregister($01040001),
+tregister($01050001),
+tregister($01010002),
+tregister($01020002),
+tregister($01030002),
+tregister($01040002),
+tregister($01050002),
+tregister($01010003),
+tregister($01020003),
+tregister($01030003),
+tregister($01040003),
+tregister($01050003),
+tregister($01010004),
+tregister($01030004),
+tregister($01040004),
+tregister($01050004),
+tregister($01010005),
+tregister($01030005),
+tregister($01040005),
+tregister($01050005),
+tregister($01010006),
+tregister($01030006),
+tregister($01040006),
+tregister($01050006),
+tregister($01010007),
+tregister($01030007),
+tregister($01040007),
+tregister($01050007),
+tregister($01050008),
+tregister($01010008),
+tregister($01030008),
+tregister($01040008),
+tregister($01050009),
+tregister($01010009),
+tregister($01030009),
+tregister($01040009),
+tregister($0105000a),
+tregister($0101000a),
+tregister($0103000a),
+tregister($0104000a),
+tregister($0105000b),
+tregister($0101000b),
+tregister($0103000b),
+tregister($0104000b),
+tregister($0105000c),
+tregister($0101000c),
+tregister($0103000c),
+tregister($0104000c),
+tregister($0105000d),
+tregister($0101000d),
+tregister($0103000d),
+tregister($0104000d),
+tregister($0105000e),
+tregister($0101000e),
+tregister($0103000e),
+tregister($0104000e),
+tregister($0105000f),
+tregister($0101000f),
+tregister($0103000f),
+tregister($0104000f),
+tregister($05000001),
+tregister($05000002),
+tregister($05000003),
+tregister($05000004),
+tregister($05000005),
+tregister($05000006),
+tregister($05000007),
+tregister($05000008),
+tregister($05000009),
+tregister($0500000a),
+tregister($0500000b),
+tregister($0500000c),
+tregister($0500000d),
+tregister($0500000e),
+tregister($0500000f),
+tregister($05000010),
+tregister($05000011),
+tregister($05000012),
+tregister($05000013),
+tregister($05000014),
+tregister($05000015),
+tregister($02000000),
+tregister($02000001),
+tregister($02000002),
+tregister($02000003),
+tregister($02000004),
+tregister($02000005),
+tregister($02000006),
+tregister($02000007),
+tregister($02000008),
+tregister($03000000),
+tregister($03000001),
+tregister($03000002),
+tregister($03000003),
+tregister($03000004),
+tregister($03000005),
+tregister($03000006),
+tregister($03000007),
+tregister($04000000),
+tregister($04000001),
+tregister($04000002),
+tregister($04000003),
+tregister($04000004),
+tregister($04000005),
+tregister($04000006),
+tregister($04000007),
+tregister($04000008),
+tregister($04000009),
+tregister($0400000a),
+tregister($0400000b),
+tregister($0400000c),
+tregister($0400000d),
+tregister($0400000e),
+tregister($0400000f)