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@@ -438,8 +438,7 @@ implementation
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function tarmshlshrnode.first_shlshr64bitint: tnode;
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begin
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- if GenerateThumbCode or GenerateThumb2Code then//or
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-// (right.nodetype <> ordconstn) then
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+ if GenerateThumbCode or GenerateThumb2Code then
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result:=inherited
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else
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result := nil;
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@@ -448,7 +447,6 @@ implementation
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procedure tarmshlshrnode.second_64bit;
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var
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v : TConstExprInt;
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- l1,l2,l3:Tasmlabel;
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so: tshifterop;
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lreg, resreg: TRegister64;
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@@ -474,7 +472,7 @@ implementation
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end;
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{This code is build like it gets called with sm=SM_LSR all the time, for SM_LSL dst* and src* have to be reversed
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- This will generate
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+ This will generate
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mov shiftval1, shiftval
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cmp shiftval1, #64
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movcs shiftval1, #64
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@@ -534,7 +532,6 @@ implementation
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location_reset(location,LOC_REGISTER,def_cgsize(resultdef));
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location.register64.reghi:=cg.getintregister(current_asmdata.CurrAsmList,OS_INT);
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location.register64.reglo:=cg.getintregister(current_asmdata.CurrAsmList,OS_INT);
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-
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{ load left operator in a register }
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if not(left.location.loc in [LOC_CREGISTER,LOC_REGISTER]) or
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masta