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@@ -764,7 +764,7 @@ Implementation
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mov reg1,reg1, shift imm2
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mov reg1,reg1, shift imm2
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mov reg1,reg1, shift imm3 ...
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mov reg1,reg1, shift imm3 ...
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}
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}
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- else if GetNextInstructionUsingReg(hp1,hp2, taicpu(p).oper[0]^.reg) and
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+ else if GetNextInstructionUsingReg(hp1,hp2, taicpu(p).oper[0]^.reg) and
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(assigned(FindRegDealloc(taicpu(p).oper[0]^.reg,tai(hp2.Next))) or
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(assigned(FindRegDealloc(taicpu(p).oper[0]^.reg,tai(hp2.Next))) or
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regLoadedWithNewValue(taicpu(p).oper[0]^.reg, hp2)) and
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regLoadedWithNewValue(taicpu(p).oper[0]^.reg, hp2)) and
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MatchInstruction(hp2, A_MOV, [taicpu(p).condition], [PF_None]) and
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MatchInstruction(hp2, A_MOV, [taicpu(p).condition], [PF_None]) and
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@@ -1219,6 +1219,72 @@ Implementation
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asml.remove(p);
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asml.remove(p);
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p.free;
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p.free;
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p:=hp1;
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p:=hp1;
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+ end
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+ {
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+ from
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+ and reg1,reg0,2^n-1
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+ mov reg2,reg1, lsl imm1
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+ (mov reg3,reg2, lsr/asr imm1)
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+ remove either the and or the lsl/xsr sequence if possible
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+ }
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+
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+ else if cutils.ispowerof2(taicpu(p).oper[2]^.val+1,i) and
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+ GetNextInstructionUsingReg(p,hp1,taicpu(p).oper[0]^.reg) and
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+ MatchInstruction(hp1, A_MOV, [taicpu(p).condition], [PF_None]) and
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+ (taicpu(hp1).ops=3) and
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+ MatchOperand(taicpu(hp1).oper[1]^, taicpu(p).oper[0]^.reg) and
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+ (taicpu(hp1).oper[2]^.typ = top_shifterop) and
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+ (taicpu(hp1).oper[2]^.shifterop^.rs = NR_NO) and
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+ (taicpu(hp1).oper[2]^.shifterop^.shiftmode=SM_LSL) and
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+ (assigned(FindRegDealloc(taicpu(p).oper[0]^.reg,tai(hp1.Next))) or
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+ regLoadedWithNewValue(taicpu(p).oper[0]^.reg, hp1)) then
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+ begin
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+ {
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+ and reg1,reg0,2^n-1
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+ mov reg2,reg1, lsl imm1
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+ mov reg3,reg2, lsr/asr imm1
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+ =>
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+ and reg1,reg0,2^n-1
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+ if lsr and 2^n-1>=imm1 or asr and 2^n-1>imm1
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+ }
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+ if GetNextInstructionUsingReg(hp1,hp2,taicpu(p).oper[0]^.reg) and
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+ MatchInstruction(hp2, A_MOV, [taicpu(p).condition], [PF_None]) and
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+ (taicpu(hp2).ops=3) and
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+ MatchOperand(taicpu(hp2).oper[1]^, taicpu(hp1).oper[0]^.reg) and
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+ (taicpu(hp2).oper[2]^.typ = top_shifterop) and
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+ (taicpu(hp2).oper[2]^.shifterop^.rs = NR_NO) and
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+ (taicpu(hp2).oper[2]^.shifterop^.shiftmode in [SM_ASR,SM_LSR]) and
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+ (taicpu(hp1).oper[2]^.shifterop^.shiftimm=taicpu(hp2).oper[2]^.shifterop^.shiftimm) and
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+ (assigned(FindRegDealloc(taicpu(hp1).oper[0]^.reg,tai(hp2.Next))) or
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+ regLoadedWithNewValue(taicpu(p).oper[0]^.reg, hp2)) and
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+ ((i<32-taicpu(hp1).oper[2]^.shifterop^.shiftimm) or
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+ ((i=32-taicpu(hp1).oper[2]^.shifterop^.shiftimm) and
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+ (taicpu(hp2).oper[2]^.shifterop^.shiftmode=SM_LSR))) then
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+ begin
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+ DebugMsg('Peephole AndLslXsr2And done', p);
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+ taicpu(p).oper[0]^.reg:=taicpu(hp2).oper[0]^.reg;
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+ asml.Remove(hp1);
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+ asml.Remove(hp2);
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+ hp1.free;
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+ hp2.free;
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+ result:=true;
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+ end
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+ {
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+ and reg1,reg0,2^n-1
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+ mov reg2,reg1, lsl imm1
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+ =>
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+ mov reg2,reg1, lsl imm1
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+ if imm1>i
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+ }
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+ else if i>32-taicpu(hp1).oper[2]^.shifterop^.shiftimm then
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+ begin
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+ DebugMsg('Peephole AndLsl2Lsl done', p);
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+ taicpu(hp1).oper[1]^.reg:=taicpu(p).oper[0]^.reg;
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+ asml.Remove(p);
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+ p.free;
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+ p:=hp1;
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+ result:=true;
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+ end
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end;
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end;
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end;
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end;
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{
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{
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florian