+ initial revision

compiler/ia64/cpuasm.pas

@@ -0,0 +1,205 @@
+{
+    $Id$
+    Copyright (c) 2000 by Florian Klaempfl
+
+    Contains the assembler object for the ia64
+
+    This program is free software; you can redistribute it and/or modify
+    it under the terms of the GNU General Public License as published by
+    the Free Software Foundation; either version 2 of the License, or
+    (at your option) any later version.
+
+    This program is distributed in the hope that it will be useful,
+    but WITHOUT ANY WARRANTY; without even the implied warranty of
+    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+    GNU General Public License for more details.
+
+    You should have received a copy of the GNU General Public License
+    along with this program; if not, write to the Free Software
+    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+
+ ****************************************************************************
+}
+unit cpuasm;
+
+{$i defines.inc}
+
+interface
+
+uses
+  cobjects,
+  aasm,globals,verbose,
+  cpubase;
+
+
+type
+  pairegalloc = ^tairegalloc;
+  tairegalloc = object(tai)
+     allocation : boolean;
+     reg        : tregister;
+     constructor alloc(r : tregister);
+     constructor dealloc(r : tregister);
+  end;
+
+  { Types of operand }
+  toptype=(top_none,top_reg,top_ref,top_const,top_symbol);
+
+  toper=record
+    case typ : toptype of
+       top_none   : ();
+       top_reg    : (reg:tregister);
+       top_qp     : (qp : tqp);
+       top_ref    : (ref:preference);
+       top_const  : (val:int64);
+       top_symbol : (sym:pasmsymbol;symofs:longint);
+  end;
+
+  paicpu = ^taicpu;
+  taicpu = object(tai)
+     is_jmp    : boolean; { is this instruction a jump? (needed for optimizer) }
+     opcode    : tasmop;
+     ops       : longint;
+     ops       : array[0..4] of longint;
+     oper
+     qp        : tqp;
+     { ALU instructions }
+     { A1,A9: integer ALU }
+     constructor op_reg_reg_reg(op : tasmop;const r1,r2,r3 : tregister);
+     { A2,A10: shift left and add }
+     constructor op_reg_reg_const_reg(qp : tqp;op : tasmop;
+       const r1,r2 : tregister;i : byte;const r3 : tregister);
+     { A3,A4,A5: integer ALU - imm.,register }
+     constructor op_reg_const_reg(qp : tqp;op : tasmop;
+       const r1 : tregister;i : longint;const r3 : tregister);
+     { A6,A7: integer compare - register,register }
+     constructor op_preg_preg_reg_reg(qp : tqp;op : tasmop;
+       cond : tasmcond;p1,p2 : tqp;const r2,r3 : tregister)
+     { A8: integer compare - imm.,register }
+     constructor op_preg_preg_const_reg(qp : tqp;op : tasmop;
+       cond : tasmcond;p1,p2 : tqp;i : longint;const r3 : tregister);
+{!!!!!!!
+     { multimedia shift and multiply }
+     constructor op_reg_reg_reg_const(qp : tqp;
+     { multimedia mux }
+     constructor op_reg_reg_mbtype(qp : tqp;
+     { multimedia shift fixed }
+     constructor op_reg_reg_const(qp : tqp;
+     { div. }
+     constructor op_reg_reg(qp : tqp;
+     { mm extract }
+     constructor op_reg_reg_const_const(qp : tqp;
+     { zero and deposit imm }
+     constructor op_reg_const_const_const(qp : tqp;
+     { deposit imm }
+     constructor op_reg_const_reg_const_const(qp : tqp;
+     { deposit }
+     constructor op_reg_reg_reg_const_const(qp : tqp;
+     { test bit }
+     { !!!! here we need also to take care of the postfix }
+     constructor op_preg_preg_reg_const(qp : tqp;
+     { test NaT }
+     { !!!! here we need also to take care of the postfix }
+     constructor op_preg_preg_reg(qp : tqp;
+     { break/nop }
+     constructor op_const(qp : tqp;
+     { speculation check }
+     constructor op_reg_const(qp : tqp;
+
+     { -------- here are some missed ----------- }
+}
+
+     { M1: integer load }
+     { M4: integer store }
+     { M6: floating-point load }
+     { M9: floating-point store }
+     constructor op_reg_ref(qp : tqp;op : tasmop;postfix : tldsttype;
+       hint : thint;const r1 : tregister;ref : preference);
+
+     { M2: integer load incremented by register }
+     { M7: floating-point load incremented by register }
+     constructor op_reg_ref_reg(qp : tqp;op : tasmop;postfix : tldsttype;
+       hint : thint;const r1 : tregister;const ref : treference;
+       const r2 : tregister);
+
+     { M3: integer load increment by imm. }
+     { M5: integer store increment by imm. }
+     { M8: floating-point load increment by imm. }
+     { M10: floating-point store increment by imm. }
+     constructor op_reg_ref_const(qp : tqp;op : tasmop;postfix : tldsttype;
+       hint : thint;const r1 : tregister;ref : preference;i : longint);
+
+     { M11: floating-point load pair}
+     constructor op_reg_ref(qp : tqp;op : tasmop;postfix : tldsttype;
+       hint : thint;const r1,r2 : tregister;ref : preference);
+
+     { M12: floating-point load pair increment by imm. }
+     constructor op_reg_ref(qp : tqp;op : tasmop;postfix : tldsttype;
+       hint : thint;const r1,r2 : tregister;ref : preference;i : longint);
+  end;
+
+  { the following objects are special for the ia64 }
+  { they decribe a stop and the bundles            }
+  paistop = ^taistop;
+  taistop = object(tai)
+    constructor init;
+  end;
+
+  { a second underscro indicates a stop }
+  tbundletemplate = (but_none,but_mii,but_mii_,
+    but_mi_i,but_mi_i_,but_mlx,but_mlx_,
+    but_mmi,but_mmi_,but_m_mi,but_m_mi_,
+    but_mfi,but_mfi_,but_mmf,but_mmf_,
+    but_mif,but_mib_,but_mbb,but_mbb_,
+    but_bbb,but_bbb_,but_mmb,but_mmb_,
+    but_mfb,but_mfb_);
+
+  paibundle = ^taibundle;
+  taibundle = object(tai)
+     template : tbundletemplate;
+     instructions : array[0..1] of paicpu;
+  end;
+
+implementation
+
+
+{*****************************************************************************
+                                 TaiStop
+*****************************************************************************}
+
+    constructor taistop.init;
+
+      begin
+         inherited init;
+         typ:=ait_stop;
+      end;
+
+
+{*****************************************************************************
+                                 TaiRegAlloc
+*****************************************************************************}
+
+    constructor tairegalloc.alloc(r : tregister);
+      begin
+        inherited init;
+        typ:=ait_regalloc;
+        allocation:=true;
+        reg:=r;
+      end;
+
+
+    constructor tairegalloc.dealloc(r : tregister);
+      begin
+        inherited init;
+        typ:=ait_regalloc;
+        allocation:=false;
+        reg:=r;
+      end;
+
+
+end.
+{
+  $Log$
+  Revision 1.1  2000-12-31 16:54:19  florian
+    + initial revision
+
+}

compiler/ia64/cpubase.pas

@@ -0,0 +1,279 @@
+{
+    $Id$
+    Copyright (C) 2000 by Florian Klaempfl
+
+    this unit implements an asmlistitem class for the iA-64 architecture
+
+    This program is free software; you can redistribute it and/or modify
+    it under the terms of the GNU General Public License as published by
+    the Free Software Foundation; either version 2 of the License, or
+    (at your option) any later version.
+
+    This program is distributed in the hope that it will be useful,
+    but WITHOUT ANY WARRANTY; without even the implied warranty of
+    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+    GNU General Public License for more details.
+
+    You should have received a copy of the GNU General Public License
+    along with this program; if not, write to the Free Software
+    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+
+ ****************************************************************************
+}
+unit cpubase;
+
+  interface
+
+    uses
+       cutils,strings,systems,cobjects,globals,aasm,cpuinfo;
+
+type
+  tasmop = (A_ADD,A_SUB,A_ADDP4,A_AND,A_ANDCM,A_OR,A_XOR,A_SHLADD,
+            A_SHLADDP4,A_ADDS,A_ADDL,A_CMP,A_CMP4,A_PADD1,A_PADD2,
+            A_PADD4,A_PSUB1,A_PSUB2,A_PSUB4,A_PAVG1,A_PAVG2,A_PAVGSUB1,
+            A_PAVGSUB2,A_PCMP1,A_PCMP2,A_PCMP4,A_PSHLADD2,A_PSHRADD2,
+            A_PMPY2,A_MIX1,A_MIX2,A_MIX4,A_PACK2,A_PACK4,A_UNPACK2,
+            A_UNPACK4,A_PMIN1,A_PMAX1,A_PMIN2,A_PMAX2,A_PSAD1,A_MUX1,
+            A_MUX2,A_PSHR2,A_PSHR4,A_SHR,A_PSHL2,A_SHL4,A_SHL,
+            A_POPCNT,A_SHRP,A_EXTR,A_DEP,A_TBIT,A_TNAT,A_BREAK,
+            A_NOP,A_CHK,A_MOV,A_ZX1,A_ZX2,A_ZXT4,A_SXT1,A_SXT2,A_SXT4,
+            A_CXZ1,A_CZX2,A_LD1,A_LD2,A_LD4,A_LD8,A_ST1,A_ST2,A_ST4,
+            A_ST8,A_LDFS,A_LDFD,A_LDF8,A_LDFE,A_LDF,A_STFS,A_STFD,A_STF8,
+            A_STFE,A_STF,A_LDFPS,A_LDFPD,A_LDFP8,A_LFETCH,A_CMPXCHG1,
+            A_CMPXCHG2,A_CMPXHG4,A_CMPXCHG8,A_XCHG1,A_XCHG2,A_XCHG4,
+            A_XCHG8,A_FETCHADD4,A_FETCHADD8,A_SETF,A_GETF,
+            A_INVALA,A_MF,A_SRLZ,A_SYNC,A_FLUSHRS,A_FC,A_ALLOC,A_SUM,
+            A_RUM,A_BR,A_CLRRRB,A_FMA,A_FPMA,A_FMS,A_FPMS,A_FNMA,A_FPNMA,
+            A_XMA,A_FSELECT,A_FCLASS,A_FRCPA,A_FPRCPA,A_FRSQRTA,
+            A_FPRSQRTA,A_FMIN,A_FMAX,A_FAMIN,A_FAMAX,A_FPMIN,A_FPMAX,
+            A_FPAMIN,A_FPAMAX,A_FPCMP,A_FMERGE,A_FMIX,A_FSXT,A_FPACK,
+            A_FSWAP,A_FAND,A_FANDCM,A_FOR,A_FXOR,A_FPMERGE,A_FCVT,
+            A_FPCVT,A_FSETC,A_FCLRT,A_FCHKF,A_MOVL);
+
+Const
+  firstop = low(tasmop);
+  lastop  = high(tasmop);
+
+type
+  TAsmCond =
+   ();
+
+  THint = (H_NONE,H_NT1,H_NT2,H_NTA);
+
+Type
+ TRegister = (R_NO,  { R_NO is Mandatory, signifies no register }
+              R_0,R_1,R_2,R_3,R_4,R_5,R_6,R_7,R_8,R_9,
+              R_10,R_11,R_12,R_13,R_14,R_15,R_16,R_17,R_18,R_19,
+              R_20,R_21,R_22,R_23,R_24,R_25,R_26,R_27,R_28,R_29,
+              R_30,R_31,
+              R_F0,R_F1,R_F2,R_F3,R_F4,R_F5,R_F6,R_F7,R_F8,R_F9,
+              R_F10,R_F11,R_F12,R_F13,R_F14,R_F15,R_F16,R_F17,R_F18,R_F19,
+              R_F20,R_F21,R_F22,R_F23,R_F24,R_F25,R_F26,R_F27,R_F28,R_F29,
+              R_F30,R_F31);
+
+  TRegisterset = Set of TRegister;
+
+  { -1 indicates no qualifying prediction }
+  tqp = -1..63;
+
+const
+  qp_none : tqp = -1;
+
+{ Constants describing the registers }
+
+Const
+  Firstreg = R_0;
+  LastReg = R_F31;
+
+  stack_pointer = R_30;
+  frame_pointer = R_15;
+  self_pointer  = R_16;
+  accumulator   = R_0;
+  global_pointer = R_29;
+  return_pointer = R_26;
+  { it is used to pass the offset to the destructor helper routine }
+  vmt_offset_reg = R_1;
+
+  max_scratch_regs = 2;
+  scratch_regs : array[1..max_scratch_regs] of tregister = (R_1,R_2);
+
+{ low and high of the available maximum width integer general purpose }
+{ registers                                                           }
+  LoGPReg = R_0;
+  HiGPReg = R_31;
+
+{ low and high of every possible width general purpose register (same as }
+{ above on most architctures apart from the 80x86)                       }
+  LoReg = R_0;
+  HiReg = R_31;
+
+  cpuflags = [cf_64bitaddr];
+
+  { sizes }
+  pointersize   = 8;
+  extended_size = 16;
+
+  general_registers = [R_0..R_31];
+
+  intregs = [R_0..R_31];
+  fpuregs = [R_F0..R_F31];
+  mmregs = [];
+
+  availabletempregsint = [R_0..R_14,R_16..R_25,R_28];
+  availabletempregsfpu = [R_F0..R_F30];
+  availabletempregsmm  = [];
+
+  c_countusableregsint = 26;
+  c_countusableregsfpu = 31;
+  c_countusableregsmm  = 0;
+
+  maxfpuvarregs = 128;
+  maxvarregs = 128;
+
+  max_operands = 4;
+
+  registers_saved_on_cdecl = [R_9..R_14,R_F2..R_F9];
+
+  varregs : Array [1..6] of Tregister =
+            (R_9,R_10,R_11,R_12,R_13,R_14);
+
+Type
+   TReference = record
+      offset : aword;
+      symbol : pasmsymbol;
+      base : tregister;
+      is_immediate : boolean;
+      offsetfixup : word; {needed for inline}
+      { the boundary to which the reference is surely aligned }
+      alignment : byte;
+   end;
+   PReference = ^TReference;
+
+   tloc = (LOC_INVALID,
+           LOC_REGISTER,
+           LOC_FPU,
+           LOC_MEM,
+           LOC_REFERENCE,
+           LOC_JUMP,
+           { the alpha doesn't have flags, but this }
+           { avoid some conditional compiling       }
+           { DON'T USE for the alpha                }
+           LOC_FLAGS,
+           LOC_CREGISTER,
+           LOC_CFPUREGISTER,
+           LOC_CONST);
+
+   tlocation = record
+   case loc : tloc of
+     LOC_REFERENCE,LOC_MEM : (reference : treference);
+     LOC_CREGISTER,
+     LOC_REGISTER : (register : tregister);
+     LOC_FLAGS : (qp : tqp);
+     LOC_JUMP : ();
+   end;
+
+{*****************************************************************************
+                   Opcode propeties (needed for optimizer)
+*****************************************************************************}
+
+{$ifndef NOOPT}
+Type
+{What an instruction can change}
+  TInsChange = (Ch_None);
+{$endif}
+
+
+{ resets all values of ref to defaults }
+procedure reset_reference(var ref : treference);
+{ set mostly used values of a new reference }
+function new_reference(base : tregister;offset : longint) : preference;
+function newreference(const r : treference) : preference;
+procedure disposereference(var r : preference);
+
+function reg2str(r : tregister) : string;
+
+{*****************************************************************************
+                                  Init/Done
+*****************************************************************************}
+
+  procedure InitCpu;
+  procedure DoneCpu;
+
+implementation
+
+uses
+   verbose;
+
+function reg2str(r : tregister) : string;
+
+  begin
+     if r in [R_0..R_31] then
+       reg2str:='R'+tostr(longint(r)-longint(R_0))
+     else if r in [R_F0..R_F31] then
+       reg2str:='F'+tostr(longint(r)-longint(R_F0))
+     else internalerror(38991);
+  end;
+
+procedure reset_reference(var ref : treference);
+begin
+  FillChar(ref,sizeof(treference),0);
+end;
+
+
+function new_reference(base : tregister;offset : longint) : preference;
+var
+  r : preference;
+begin
+  new(r);
+  FillChar(r^,sizeof(treference),0);
+  r^.offset:=offset;
+  r^.alignment:=8;
+  new_reference:=r;
+end;
+
+function newreference(const r : treference) : preference;
+
+var
+   p : preference;
+begin
+   new(p);
+   p^:=r;
+   newreference:=p;
+end;
+
+procedure disposereference(var r : preference);
+
+begin
+  dispose(r);
+  r:=Nil;
+end;
+
+{*****************************************************************************
+                                  Init/Done
+*****************************************************************************}
+
+  procedure InitCpu;
+    begin
+    end;
+
+  procedure DoneCpu;
+    begin
+    end;
+
+end.
+{
+  $Log$
+  Revision 1.1  2000-12-31 16:54:19  florian
+    + initial revision
+
+  Revision 1.1  2000/07/13 06:30:11  michael
+  + Initial import
+
+  Revision 1.1  2000/07/09 10:40:12  peter
+    * renamed to lowercase
+
+  Revision 1.1  2000/03/09 20:28:00  florian
+    * initial release derieved from the ALPHA cpubase.pas, the
+      file still contains some ALPHA stuff
+
+}

compiler/ia64/cpuinfo.pas

@@ -0,0 +1,60 @@
+{
+    $Id$
+    Copyright (c) 1998-2000 by Florian Klaempfl
+
+    Basic Processor information
+
+    This program is free software; you can redistribute it and/or modify
+    it under the terms of the GNU General Public License as published by
+    the Free Software Foundation; either version 2 of the License, or
+    (at your option) any later version.
+
+    This program is distributed in the hope that it will be useful,
+    but WITHOUT ANY WARRANTY; without even the implied warranty of
+    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+    GNU General Public License for more details.
+
+    You should have received a copy of the GNU General Public License
+    along with this program; if not, write to the Free Software
+    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+
+ ****************************************************************************
+}
+Unit CPUInfo;
+
+{$i defines.inc}
+
+Interface
+
+Type
+   AWord = QWord;
+
+   { the ordinal type used when evaluating constant integer expressions }
+   TConstExprInt = int64;
+   { ... the same unsigned }
+   TConstExprUInt = {$ifdef fpc}qword{$else}int64{$endif};
+
+   { this must be an ordinal type with the same size as a pointer }
+   { to allow some dirty type casts for example when using        }
+   { tconstsym.value                                              }
+   TPointerOrd = int64;
+
+
+Const
+   { Size of native extended type }
+   extended_size = 10;
+
+   c_countusableregsint = 95;
+   c_countusableregsfpu = 95;
+   c_countusableregsmm  = 0;
+   c_countusableregsqp  = 48;
+
+Implementation
+
+end.
+{
+  $Log$
+  Revision 1.1  2000-12-31 16:54:19  florian
+    + initial revision
+
+}

compiler/ia64/tgcpu.pas

@@ -0,0 +1,399 @@
+{
+    $Id$
+    Copyright (C) 2000 by Florian Klaempfl
+
+    This unit handles the temporary variables stuff for iA64
+    This program is free software; you can redistribute it and/or modify
+    it under the terms of the GNU General Public License as published by
+    the Free Software Foundation; either version 2 of the License, or
+    (at your option) any later version.
+
+    This program is distributed in the hope that it will be useful,
+    but WITHOUT ANY WARRANTY; without even the implied warranty of
+    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+    GNU General Public License for more details.
+
+    You should have received a copy of the GNU General Public License
+    along with this program; if not, write to the Free Software
+    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+
+ ****************************************************************************
+}
+unit tgcpu;
+
+{$i defines.inc}
+
+interface
+
+    uses
+       cobjects,globals,
+       hcodegen,verbose,aasm,
+       node,
+       cpuinfo,cpubase,cpuasm;
+
+    const
+       { this is iA64 specific }
+       countusableregqp : byte = c_countusableregsqp;
+
+       { this value is used in tsaved, if the register isn't saved }
+       reg_not_saved = $7fffffff;
+
+    type
+       tpushed = array[R_NO..R_NO] of boolean;
+       tsaved = array[R_NO..R_NO] of longint;
+
+    var
+       { tries to hold the amount of times which the current tree is processed  }
+       t_times : longint;
+
+    function getregisterint : tregister;
+    procedure ungetregisterint(r : tregister);
+    { tries to allocate the passed register, if possible }
+    function getexplicitregisterint(r : tregister) : tregister;
+
+    procedure ungetregister(r : tregister);
+
+    procedure cleartempgen;
+    procedure del_reference(const ref : treference);
+    procedure del_locref(const location : tlocation);
+    procedure del_location(const l : tlocation);
+
+    { pushs and restores registers }
+    procedure pushusedregisters(var pushed : tpushed;b : byte);
+    procedure popusedregisters(const pushed : tpushed);
+
+    { saves and restores used registers to temp. values }
+    procedure saveusedregisters(var saved : tsaved;b : byte);
+    procedure restoreusedregisters(const saved : tsaved);
+
+    { increments the push count of all registers in b}
+    procedure incrementregisterpushed(b : byte);
+
+    procedure clearregistercount;
+    procedure resetusableregisters;
+
+    type
+       regvar_longintarray = array[0..128+128+64-1] of longint;
+       regvar_booleanarray = array[0..128+128+64-1] of boolean;
+       regvar_ptreearray = array[0..128+128+64-1] of tnode;
+
+    var
+       unused,usableregs : tregisterset;
+
+       { uses only 1 byte while a set uses in FPC 32 bytes }
+       usedinproc : byte;
+
+       { count, how much a register must be pushed if it is used as register }
+       { variable                                                           }
+       reg_pushes : regvar_longintarray;
+       is_reg_var : regvar_booleanarray;
+
+
+implementation
+
+    uses
+      globtype,temp_gen;
+
+    procedure incrementregisterpushed(b : byte);
+
+      var
+         regi : tregister;
+
+      begin
+{!!!!!!!!
+         for regi:=R_EAX to R_EDI do
+           begin
+              if (b and ($80 shr word(regi)))<>0 then
+                inc(reg_pushes[regi],t_times*2);
+           end;
+}
+      end;
+
+    procedure pushusedregisters(var pushed : tpushed;b : byte);
+
+      var
+         r : tregister;
+
+      begin
+{!!!!!!!!
+         usedinproc:=usedinproc or b;
+         for r:=R_EAX to R_EBX do
+           begin
+              pushed[r]:=false;
+              { if the register is used by the calling subroutine    }
+              if ((b and ($80 shr byte(r)))<>0) then
+                begin
+                   { and is present in use }
+                   if not(r in unused) then
+                     begin
+                        { then save it }
+                        exprasmlist^.concat(new(paicpu,op_reg(A_PUSH,S_L,r)));
+
+                        { here was a big problem  !!!!!}
+                        { you cannot do that for a register that is
+                        globally assigned to a var
+                        this also means that you must push it much more
+                        often, but there must be a better way
+                        maybe by putting the value back to the stack !! }
+                        if not(is_reg_var[r]) then
+                          begin
+                            unused:=unused+[r];
+                          end;
+                        pushed[r]:=true;
+                     end;
+                end;
+           end;
+}
+      end;
+
+    procedure saveusedregisters(var saved : tsaved;b : byte);
+
+      var
+         r : tregister;
+         hr : treference;
+
+      begin
+{!!!!!!!
+         usedinproc:=usedinproc or b;
+         for r:=R_EAX to R_EBX do
+           begin
+              saved[r]:=reg_not_saved;
+              { if the register is used by the calling subroutine    }
+              if ((b and ($80 shr byte(r)))<>0) then
+                begin
+                   { and is present in use }
+                   if not(r in unused) then
+                     begin
+                        { then save it }
+                        gettempofsizereference(4,hr);
+                        saved[r]:=hr.offset;
+                        exprasmlist^.concat(new(paicpu,op_reg_ref(A_MOV,S_L,r,newreference(hr))));
+                        { here was a big problem  !!!!!}
+                        { you cannot do that for a register that is
+                        globally assigned to a var
+                        this also means that you must push it much more
+                        often, but there must be a better way
+                        maybe by putting the value back to the stack !! }
+                        if not(is_reg_var[r]) then
+                          begin
+                            unused:=unused+[r];
+                          end;
+                     end;
+                end;
+           end;
+}
+      end;
+
+    procedure popusedregisters(const pushed : tpushed);
+
+      var
+         r : tregister;
+
+      begin
+{!!!!!!!
+         { restore in reverse order: }
+         for r:=R_EBX downto R_EAX do
+           if pushed[r] then
+             begin
+                exprasmlist^.concat(new(paicpu,op_reg(A_POP,S_L,r)));
+                unused:=unused-[r];
+             end;
+}
+      end;
+
+    procedure restoreusedregisters(const saved : tsaved);
+      var
+         r : tregister;
+         hr : treference;
+
+      begin
+{
+         { restore in reverse order: }
+         for r:=R_EBX downto R_EAX do
+           if saved[r]<>reg_not_saved then
+             begin
+                reset_reference(hr);
+                hr.base:=frame_pointer;
+                hr.offset:=saved[r];
+                exprasmlist^.concat(new(paicpu,op_ref_reg(A_MOV,S_L,newreference(hr),r)));
+                unused:=unused-[r];
+                ungetiftemp(hr);
+             end;
+}
+      end;
+
+    procedure ungetregister(r : tregister);
+
+      begin
+{
+         if r in [R_EAX,R_ECX,R_EDX,R_EBX,R_ESP,R_EBP,R_ESI,R_EDI] then
+           ungetregister32(r)
+          else if r in [R_AX,R_CX,R_DX,R_BX,R_SP,R_BP,R_SI,R_DI] then
+           ungetregister32(reg16toreg32(r))
+         else if r in [R_AL,R_BL,R_CL,R_DL] then
+           ungetregister32(reg8toreg32(r))
+         else internalerror(18);
+}
+      end;
+
+    procedure ungetregisterint(r : tregister);
+
+      begin
+{
+         if (r = R_EDI) or
+            ((not assigned(procinfo^._class)) and (r = R_ESI)) then
+           begin
+             exprasmlist^.concat(new(pairegalloc,dealloc(r)));
+             exit;
+           end;
+         if cs_regalloc in aktglobalswitches then
+           begin
+              { takes much time }
+              if not(r in usableregs) then
+                exit;
+              unused:=unused+[r];
+              inc(usablereg32);
+           end
+         else
+           begin
+              if not(r in [R_EAX,R_EBX,R_ECX,R_EDX]) then
+                exit;
+                  inc(usablereg32);
+              unused:=unused+[r];
+           end;
+         exprasmlist^.concat(new(pairegalloc,dealloc(r)));
+}
+      end;
+
+
+    procedure del_reference(const ref : treference);
+
+      begin
+         if ref.is_immediate then
+           exit;
+         ungetregisterint(ref.base);
+      end;
+
+
+    procedure del_locref(const location : tlocation);
+      begin
+         if (location.loc<>LOC_MEM) and (location.loc<>LOC_REFERENCE) then
+           exit;
+         if location.reference.is_immediate then
+           exit;
+         ungetregisterint(location.reference.base);
+      end;
+
+
+    procedure del_location(const l : tlocation);
+      begin
+        case l.loc of
+          LOC_REGISTER :
+            ungetregister(l.register);
+          LOC_MEM,LOC_REFERENCE :
+            del_reference(l.reference);
+        end;
+      end;
+
+
+    function getregisterint : tregister;
+      begin
+{
+         if usableregint=0 then
+           internalerror(10);
+         dec(usableregint);
+         if R_EAX in unused then
+           begin
+              unused:=unused-[R_EAX];
+              usedinproc:=usedinproc or ($80 shr byte(R_EAX));
+              getregister32:=R_EAX;
+              exprasmlist^.concat(new(pairegalloc,alloc(R_EAX)));
+           end
+         else if R_EDX in unused then
+           begin
+              unused:=unused-[R_EDX];
+              usedinproc:=usedinproc or ($80 shr byte(R_EDX));
+              getregister32:=R_EDX;
+              exprasmlist^.concat(new(pairegalloc,alloc(R_EDX)));
+           end
+         else if R_EBX in unused then
+           begin
+              unused:=unused-[R_EBX];
+              usedinproc:=usedinproc or ($80 shr byte(R_EBX));
+              getregister32:=R_EBX;
+              exprasmlist^.concat(new(pairegalloc,alloc(R_EBX)));
+           end
+         else if R_ECX in unused then
+           begin
+              unused:=unused-[R_ECX];
+              usedinproc:=usedinproc or ($80 shr byte(R_ECX));
+              getregister32:=R_ECX;
+              exprasmlist^.concat(new(pairegalloc,alloc(R_ECX)));
+           end
+         else internalerror(10);
+}
+      end;
+
+    function getexplicitregisterint(r : tregister) : tregister;
+
+      begin
+{
+         if r in [R_ESI,R_EDI] then
+           begin
+             exprasmlist^.concat(new(pairegalloc,alloc(r)));
+             getexplicitregister32 := r;
+             exit;
+           end;
+         if r in unused then
+           begin
+              dec(usablereg32);
+              unused:=unused-[r];
+              usedinproc:=usedinproc or ($80 shr byte(r));
+              exprasmlist^.concat(new(pairegalloc,alloc(r)));
+              getexplicitregister32:=r;
+           end
+         else
+           getexplicitregister32:=getregister32;
+}
+      end;
+
+    procedure cleartempgen;
+
+      begin
+         unused:=usableregs;
+         countusableregint:=c_countusableregsint;
+         countusableregfpu:=c_countusableregsfpu;
+         countusableregqp:=c_countusableregsqp;
+      end;
+
+
+   procedure clearregistercount;
+      var
+        regi : tregister;
+      begin
+{
+         for regi:=R_EAX to R_EDI do
+           begin
+              reg_pushes[regi]:=0;
+              is_reg_var[regi]:=false;
+           end;
+}
+      end;
+
+   procedure resetusableregisters;
+      begin
+{
+        usableregs:=[R_EAX,R_EBX,R_ECX,R_EDX];
+        c_usableregs:=4;
+}
+      end;
+
+begin
+  resetusableregisters;
+end.
+{
+  $Log$
+  Revision 1.1  2000-12-31 16:54:19  florian
+    + initial revision
+
+}