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+ added test tasm18b.pp, which is yet another for 3-byte records, which should
not set a valid operand size in the intel asm syntax mode. The difference
with tasm18a.pp is, this one tests recordtype.a3bytefield, while tasm18a.pp
tests a3byterecord directly.

git-svn-id: trunk@38199 -

nickysn 7 years ago
parent
commit
a834e6d5c5
2 changed files with 40 additions and 0 deletions
  1. 1 0
      .gitattributes
  2. 39 0
      tests/test/tasm18b.pp

+ 1 - 0
.gitattributes

@@ -12495,6 +12495,7 @@ tests/test/tasm16.pp svneol=native#text/plain
 tests/test/tasm17.pp svneol=native#text/plain
 tests/test/tasm18.pp svneol=native#text/plain
 tests/test/tasm18a.pp svneol=native#text/plain
+tests/test/tasm18b.pp svneol=native#text/plain
 tests/test/tasm2.inc svneol=native#text/plain
 tests/test/tasm2.pp svneol=native#text/plain
 tests/test/tasm2a.pp svneol=native#text/plain

+ 39 - 0
tests/test/tasm18b.pp

@@ -0,0 +1,39 @@
+{ %FAIL }
+{ %CPU=i8086,i386,x86_64 }
+program tasm18b;
+
+{$ifdef FPC}
+  {$asmmode intel}
+{$else}
+  {$define CPUI8086}
+{$endif FPC}
+
+const
+  cval = 1;
+
+type
+  foo3 = packed record
+    b1: byte;
+    b2: byte;
+    b3: byte;
+  end;
+  foo = packed record
+    bb1: byte;
+    fb3: foo3;
+  end;
+
+begin
+  asm
+    { this should produce an error, because foo3 is a 3-byte record and there's
+      no explicit operand size specified (i.e. no 'byte ptr' or 'word ptr') }
+{$ifdef CPUI8086}
+    test [di + foo.fb3], cval
+{$endif}
+{$ifdef CPUI386}
+    test [edi + foo.fb3], cval
+{$endif}
+{$ifdef CPUX86_64}
+    test [rdi + foo.fb3], cval
+{$endif}
+  end;
+end.