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* MIPS: Fixed code generation for PIC global symbols with large offset, resolves #30552.

git-svn-id: trunk@34902 -
sergei 8 years ago
parent
commit
b4904deea8
3 changed files with 31 additions and 0 deletions
  1. 1 0
      .gitattributes
  2. 1 0
      compiler/mips/cgcpu.pas
  3. 29 0
      tests/webtbs/tw30552.pp

+ 1 - 0
.gitattributes

@@ -15241,6 +15241,7 @@ tests/webtbs/tw30522.pp svneol=native#text/plain
 tests/webtbs/tw30530.pp svneol=native#text/pascal
 tests/webtbs/tw30534.pp svneol=native#text/pascal
 tests/webtbs/tw30537.pp svneol=native#text/pascal
+tests/webtbs/tw30552.pp svneol=native#text/pascal
 tests/webtbs/tw30570.pp svneol=native#text/plain
 tests/webtbs/tw30572.pp svneol=native#text/plain
 tests/webtbs/tw3063.pp svneol=native#text/plain

+ 1 - 0
compiler/mips/cgcpu.pas

@@ -207,6 +207,7 @@ begin
     ref.base:=tmpreg1   { offset alone, weird but possible }
   else
     begin
+      tmpreg:=ref.base;
       if (not base_replaced) then
         ref.base:=getintregister(list,OS_ADDR);
       list.concat(taicpu.op_reg_reg_reg(A_ADDU,ref.base,tmpreg,tmpreg1))

+ 29 - 0
tests/webtbs/tw30552.pp

@@ -0,0 +1,29 @@
+{ %TARGET=linux,android }
+{ %OPT=-Cg }
+{ This test uncovered code generation bug on MIPS when addressing a large global record
+  in position-independent way, but of course it cannot hurt to test other CPUs. }
+unit Test;
+
+interface
+
+type
+  TMyInnerRecord = packed record
+                          end;
+  PMyInnerRecord = ^TMyInnerRecord;
+  TMyRecord = record
+    ALotOfData: array[0..10000] of Cardinal;
+    MyPointer: PMyInnerRecord;
+  end;
+var
+  MyGlobalVariable: TMyRecord;
+
+implementation
+
+procedure TestProcedure;
+begin
+  with MyGlobalVariable.MyPointer^ do begin
+    end;
+end;
+
+begin {main}
+end.