m68k: disabled premature MOVEA #0,Ax to SUBA Ax,Ax in the CG, because it breaks with spilling temp replacement and moved it to the optimizer, where it belongs. this fixes some code with potentially heavy address register pressure, like the IDE.

git-svn-id: trunk@30245 -

compiler/m68k/aoptcpu.pas

@@ -112,6 +112,17 @@ unit aoptcpu;
                           result:=true;
                         end;
                   end;
+              { MOVEA #0,Ax to SUBA Ax,Ax, because it's shorter }
+              A_MOVEA:
+                if (taicpu(p).oper[0]^.typ = top_const) and
+                   (taicpu(p).oper[0]^.val = 0) then
+                  begin
+                    DebugMsg('Optimizer: MOVEA #0,Ax to SUBA Ax,Ax',p);
+                    taicpu(p).opcode:=A_SUBA;
+                    taicpu(p).opsize:=S_L; { otherwise it will be .W -> BOOM }
+                    taicpu(p).loadoper(0,taicpu(p).oper[1]^);
+                    result:=true;
+                  end;
               { CMP #0,<ea> equals to TST <ea>, just shorter and TST is more flexible anyway }
               A_CMP:
                 if (taicpu(p).oper[0]^.typ = top_const) and

compiler/m68k/cgcpu.pas

@@ -742,9 +742,13 @@ unit cgcpu;
         if isaddressregister(register) then
           begin
             { an m68k manual I have recommends SUB Ax,Ax to be used instead of CLR for address regs }
-            if a = 0 then
+            { Premature optimization is the root of all evil - this code breaks spilling if the
+              register contains a spilled regvar, eg. a Pointer which is set to nil, then random
+              havoc happens... This is kept here for reference now, to allow fixing of the spilling
+              later. Most of the optimizations below here could be moved to the optimizer. (KB) }
+            {if a = 0 then
               list.concat(taicpu.op_reg_reg(A_SUB,S_L,register,register))
-            else
+            else}
               { ISA B/C Coldfire has MOV3Q which can move -1 or 1..7 to any reg }
               if (current_settings.cputype in [cpu_isa_b,cpu_isa_c]) and 
                  ((longint(a) = -1) or ((longint(a) > 0) and (longint(a) < 8))) then