* fix extension to 64 bit on aarch64, resolves #40576

compiler/aarch64/cgcpu.pas

@@ -1057,7 +1057,22 @@ implementation
                 list.concat(taicpu.op_reg_reg_const_const(A_UBFIZ,makeregsize(reg2,OS_64),makeregsize(reg1,OS_64),0,32));
               OS_64,
               OS_S64:
-                list.concat(taicpu.op_reg_reg(A_SXTW,reg2,makeregsize(reg1,OS_32)));
+                case fromsize of
+                  OS_8:
+                    list.concat(taicpu.op_reg_reg(A_UXTB,reg2,makeregsize(reg1,OS_64)));
+                  OS_S8:
+                    list.concat(taicpu.op_reg_reg(A_SXTB,reg2,makeregsize(reg1,OS_64)));
+                  OS_16:
+                    list.concat(taicpu.op_reg_reg(A_UXTH,reg2,makeregsize(reg1,OS_64)));
+                  OS_S16:
+                    list.concat(taicpu.op_reg_reg(A_SXTH,reg2,makeregsize(reg1,OS_64)));
+                  OS_32:
+                    list.concat(taicpu.op_reg_reg_const_const(A_UBFIZ,makeregsize(reg2,OS_64),makeregsize(reg1,OS_64),0,32));
+                  OS_S32:
+                    list.concat(taicpu.op_reg_reg(A_SXTW,reg2,makeregsize(reg1,OS_64)));
+                  else
+                    internalerror(2024070701);
+                end;
               else
                 internalerror(2002090901);
             end;

tests/webtbs/tw40576.pp

@@ -0,0 +1,19 @@
+{ %OPT=-O2 }
+Program Ts;
+
+Procedure ShortTest;
+VAR
+   a: byte;
+   b: shortint absolute a;
+BEGIN
+  for a := 0 to 255 do 
+    begin
+      writeln (a:4,b:5);
+      if (a>127) and (a=b) then
+        halt(1);
+    end;
+END;
+
+BEGIN
+  Shorttest
+END.