Small fixes to OpCmp2OpS

1.) For UMULL and UMLAL support we would have to make sure the following
code checks RdHi and RdLo, which is currently not supported.
The former code would transform the following

  umull r0, r1, r2, r3
  cmp   r0, #0
  bne   .LSomething

into

  umulls r0,r1,r2,r3
  bne    .LSomething

which is wrong. UMULL has a 64bit result in r1+r0 and checks the full 64bit for 0
before setting the Z flag.

2.) Support MLA.

3.) Support MI/PL/NE/EQ for all instructions. As all of them are setting
the N and Z flags in the same way only based on the result of the
operation not on its input values.

N:=Result[31];
Z:=Result = 0;

Wurst

git-svn-id: trunk@22213 -

compiler/arm/aoptcpu.pas

@@ -361,7 +361,7 @@ Implementation
             { this optimization can applied only to the currently enabled operations because
               the other operations do not update all flags and FPC does not track flag usage }
             if ((taicpu(p).opcode in [A_ADC,A_ADD,A_BIC,A_SUB,A_MUL,A_MVN,A_MOV,
-                                      A_ORR,A_EOR,A_AND,A_RSB,A_RSC,A_SBC,A_UMULL,A_UMLAL])
+                                      A_ORR,A_EOR,A_AND,A_RSB,A_RSC,A_SBC,A_MLA])
                ) and
               (taicpu(p).oppostfix = PF_None) and
               (taicpu(p).condition = C_None) and
@@ -375,10 +375,13 @@ Implementation
               { be careful here, following instructions could use other flags
                 however after a jump fpc never depends on the value of flags }
               (taicpu(hp2).opcode = A_B) and
-              (((taicpu(p).opcode in [A_ADC,A_ADD,A_SBC,A_SUB]) and
-                (taicpu(hp2).condition in [C_EQ,C_NE,C_MI,C_PL])) or
-                (taicpu(hp2).condition in [C_EQ,C_NE])) and
-               assigned(FindRegDealloc(NR_DEFAULTFLAGS,tai(hp2.Next))) then
+              { All above instructions set Z and N according to the following
+                Z := result = 0;
+                N := result[31];
+                EQ = Z=1; NE = Z=0;
+                MI = N=1; PL = N=0; }
+              (taicpu(hp2).condition in [C_EQ,C_NE,C_MI,C_PL]) and
+              assigned(FindRegDealloc(NR_DEFAULTFLAGS,tai(hp2.Next))) then
              begin
                asml.insertbefore(tai_comment.Create(strpnew('Peephole OpCmp2OpS done')), p);