* fixed stm and ldm to be usable with preindex operand

compiler/arm/aasmcpu.pas

@@ -51,7 +51,8 @@ uses
          constructor op_reg_reg(op : tasmop;_op1,_op2 : tregister);
          constructor op_reg_ref(op : tasmop;_op1 : tregister;const _op2 : treference);
          constructor op_reg_const(op:tasmop; _op1: tregister; _op2: longint);
-         constructor op_reg_regset(op:tasmop; _op1: tregister; _op2: tsuperregisterset);
+
+         constructor op_ref_regset(op:tasmop; _op1: treference; _op2: tsuperregisterset);
 
          constructor op_reg_reg_reg(op : tasmop;_op1,_op2,_op3 : tregister);
          constructor op_reg_reg_const(op : tasmop;_op1,_op2 : tregister; _op3: Longint);
@@ -170,11 +171,11 @@ implementation
       end;
 
 
-    constructor taicpu.op_reg_regset(op:tasmop; _op1: tregister; _op2: tsuperregisterset);
+    constructor taicpu.op_ref_regset(op:tasmop; _op1: treference; _op2: tsuperregisterset);
       begin
          inherited create(op);
          ops:=2;
-         loadreg(0,_op1);
+         loadref(0,_op1);
          loadregset(1,_op2);
       end;
 
@@ -365,7 +366,10 @@ implementation
 end.
 {
   $Log$
-  Revision 1.10  2003-09-04 21:07:03  florian
+  Revision 1.11  2003-09-06 11:21:49  florian
+    * fixed stm and ldm to be usable with preindex operand
+
+  Revision 1.10  2003/09/04 21:07:03  florian
     * ARM compiler compiles again
 
   Revision 1.9  2003/09/04 00:15:29  florian

compiler/arm/agarmgas.pas

@@ -203,7 +203,17 @@ unit agarmgas;
                // debug code
                // writeln(s);
                // writeln(taicpu(hp).fileinfo.line);
-               s:=s+sep+getopstr(taicpu(hp).oper[i]);
+
+               { LDM and STM use references as first operand but they are written like a register }
+               if (i=0) and (op in [A_LDM,A_STM]) then
+                 begin
+                   s:=s+sep+gas_regname(taicpu(hp).oper[0].ref^.index);
+                   if taicpu(hp).oper[0].ref^.addressmode=AM_PREINDEXED then
+                     s:=s+'!';
+                 end
+               else
+                  s:=s+sep+getopstr(taicpu(hp).oper[i]);
+
                sep:=',';
             end;
         end;
@@ -216,7 +226,10 @@ begin
 end.
 {
   $Log$
-  Revision 1.10  2003-09-05 23:57:01  florian
+  Revision 1.11  2003-09-06 11:21:49  florian
+    * fixed stm and ldm to be usable with preindex operand
+
+  Revision 1.10  2003/09/05 23:57:01  florian
     * arm is working again as before the new register naming scheme was implemented
 
   Revision 1.9  2003/09/04 00:15:29  florian

compiler/arm/cgcpu.pas

@@ -694,6 +694,8 @@ unit cgcpu;
 
 
     procedure tcgarm.g_stackframe_entry(list : taasmoutput;localsize : longint);
+      var
+         ref : treference;
       begin
         LocalSize:=align(LocalSize,4);
 
@@ -702,8 +704,11 @@ unit cgcpu;
         a_reg_alloc(list,NR_R12);
 
         list.concat(taicpu.op_reg_reg(A_MOV,NR_R12,NR_STACK_POINTER_REG));
-        { restore int registers and return }
-        list.concat(setoppostfix(taicpu.op_reg_regset(A_STM,NR_STACK_POINTER_REG,rg.used_in_proc_int-[RS_R0..RS_R3]+[RS_R11,RS_R12,RS_R15]),PF_FD));
+        { save int registers }
+        reference_reset(ref);
+        ref.index:=NR_STACK_POINTER_REG;
+        ref.addressmode:=AM_PREINDEXED;
+        list.concat(setoppostfix(taicpu.op_ref_regset(A_STM,ref,rg.used_in_proc_int-[RS_R0..RS_R3]+[RS_R11,RS_R12,RS_R15]),PF_FD));
 
         list.concat(taicpu.op_reg_reg_const(A_SUB,NR_FRAME_POINTER_REG,NR_R12,4));
         a_reg_alloc(list,NR_R12);
@@ -714,12 +719,19 @@ unit cgcpu;
 
 
     procedure tcgarm.g_return_from_proc(list : taasmoutput;parasize : aword);
+      var
+         ref : treference;
       begin
         if (current_procinfo.framepointer=NR_STACK_POINTER_REG) then
           list.concat(taicpu.op_reg_reg(A_MOV,NR_R15,NR_R14))
         else
-          { restore int registers and return }
-          list.concat(setoppostfix(taicpu.op_reg_regset(A_LDM,NR_R11,rg.used_in_proc_int-[RS_R0..RS_R3]+[RS_R11,RS_R13,RS_R15]),PF_EA));
+          begin
+            { restore int registers and return }
+            reference_reset(ref);
+            ref.index:=NR_FRAME_POINTER_REG;
+            ref.addressmode:=AM_PREINDEXED;
+            list.concat(setoppostfix(taicpu.op_ref_regset(A_LDM,ref,rg.used_in_proc_int-[RS_R0..RS_R3]+[RS_R11,RS_R13,RS_R15]),PF_EA));
+          end;
       end;
 
 
@@ -1082,7 +1094,10 @@ begin
 end.
 {
   $Log$
-  Revision 1.15  2003-09-05 23:57:01  florian
+  Revision 1.16  2003-09-06 11:21:50  florian
+    * fixed stm and ldm to be usable with preindex operand
+
+  Revision 1.15  2003/09/05 23:57:01  florian
     * arm is working again as before the new register naming scheme was implemented
 
   Revision 1.14  2003/09/04 21:07:03  florian