* MIPS: updated registers, dropped special registers not recognized by GAS (actually, "pc" is recognized, but it is used only for MIPS16 mode, so it is easier to add back if/when this mode is supported), added FPU condition code registers ($fcc0..$fcc7).

* cpubase.pas, std_regname: changed logic to lookup known names for special registers before resorting to default name, so that $fcc0..$fcc7 can be used as operands.

git-svn-id: trunk@27992 -

compiler/mips/cpubase.pas

@@ -379,23 +379,20 @@ unit cpubase;
         p : tregisterindex;
         hr : tregister;
       begin
-        if getregtype(r)=R_SPECIALREGISTER then
+        hr:=r;
+        case getsubreg(hr) of
+          R_SUBFD:
+            setsubreg(hr, R_SUBFS);
+          R_SUBL, R_SUBW, R_SUBD, R_SUBQ:
+            setsubreg(hr, R_SUBD);
+        end;
+        p:=findreg_by_number_table(hr,regnumber_index);
+        if p<>0 then
+          result:=std_regname_table[p]
+        else if getregtype(r)=R_SPECIALREGISTER then
           result:=tostr(getsupreg(r))
         else
-          begin
-            hr:=r;
-            case getsubreg(hr) of
-              R_SUBFD:
-                setsubreg(hr, R_SUBFS);
-              R_SUBL, R_SUBW, R_SUBD, R_SUBQ:
-               setsubreg(hr, R_SUBD);
-            end;
-            p:=findreg_by_number_table(hr,regnumber_index);
-            if p<>0 then
-              result:=std_regname_table[p]
-            else
-              result:=generic_regname(r);
-          end;
+          result:=generic_regname(r);
       end;
 
     function dwarf_reg(r:tregister):shortint;

compiler/mips/mipsreg.dat

@@ -72,12 +72,12 @@ F29,$02,$06,$1D,f29,$f29,61,61
 F30,$02,$06,$1E,f30,$f30,62,62
 F31,$02,$06,$1F,f31,$f31,63,63
 
-PC,$05,$00,$00,PC,pc,-1,-1
-HI,$05,$00,$01,HI,hi,68,68
-LO,$05,$00,$02,LO,lo,69,69
-CR,$05,$00,$03,CR,cr,70,70
-FCR0,$05,$00,$04,fcr0,fcr0,71,71
-FCR25,$05,$00,$05,fcr25,fcr25,72,72
-FCR26,$05,$00,$06,fcr26,fcr26,73,73
-FCR28,$05,$00,$07,fcr28,fcr28,74,74
-FCSR,$05,$00,$08,fcsr,fcsr,75,75
+; mips4+ floating-point condition code registers (1-bit)
+FCC0,$05,$00,$00,fcc0,$fcc0,-1,-1
+FCC1,$05,$00,$01,fcc1,$fcc1,-1,-1
+FCC2,$05,$00,$02,fcc2,$fcc2,-1,-1
+FCC3,$05,$00,$03,fcc3,$fcc3,-1,-1
+FCC4,$05,$00,$04,fcc4,$fcc4,-1,-1
+FCC5,$05,$00,$05,fcc5,$fcc5,-1,-1
+FCC6,$05,$00,$06,fcc6,$fcc6,-1,-1
+FCC7,$05,$00,$07,fcc7,$fcc7,-1,-1

compiler/mips/rmipscon.inc

@@ -64,12 +64,11 @@ NR_F28 = tregister($0206001C);
 NR_F29 = tregister($0206001D);
 NR_F30 = tregister($0206001E);
 NR_F31 = tregister($0206001F);
-NR_PC = tregister($05000000);
-NR_HI = tregister($05000001);
-NR_LO = tregister($05000002);
-NR_CR = tregister($05000003);
-NR_FCR0 = tregister($05000004);
-NR_FCR25 = tregister($05000005);
-NR_FCR26 = tregister($05000006);
-NR_FCR28 = tregister($05000007);
-NR_FCSR = tregister($05000008);
+NR_FCC0 = tregister($05000000);
+NR_FCC1 = tregister($05000001);
+NR_FCC2 = tregister($05000002);
+NR_FCC3 = tregister($05000003);
+NR_FCC4 = tregister($05000004);
+NR_FCC5 = tregister($05000005);
+NR_FCC6 = tregister($05000006);
+NR_FCC7 = tregister($05000007);

compiler/mips/rmipsdwf.inc

@@ -65,11 +65,10 @@
 62,
 63,
 -1,
-68,
-69,
-70,
-71,
-72,
-73,
-74,
-75
+-1,
+-1,
+-1,
+-1,
+-1,
+-1,
+-1

compiler/mips/rmipsgas.inc

@@ -64,12 +64,11 @@
 '$f29',
 '$f30',
 '$f31',
-'pc',
-'hi',
-'lo',
-'cr',
-'fcr0',
-'fcr25',
-'fcr26',
-'fcr28',
-'fcsr'
+'$fcc0',
+'$fcc1',
+'$fcc2',
+'$fcc3',
+'$fcc4',
+'$fcc5',
+'$fcc6',
+'$fcc7'

compiler/mips/rmipsgri.inc

@@ -63,13 +63,12 @@
 40,
 41,
 42,
-0,
+65,
+66,
+67,
 68,
 69,
 70,
 71,
 72,
-73,
-66,
-67,
-65
+0

compiler/mips/rmipsnor.inc

@@ -1,2 +1,2 @@
 { don't edit, this file is generated from mipsreg.dat }
-74
+73

compiler/mips/rmipsnum.inc

@@ -64,12 +64,11 @@ NR_F28,
 NR_F29,
 NR_F30,
 NR_F31,
-NR_PC,
-NR_HI,
-NR_LO,
-NR_CR,
-NR_FCR0,
-NR_FCR25,
-NR_FCR26,
-NR_FCR28,
-NR_FCSR
+NR_FCC0,
+NR_FCC1,
+NR_FCC2,
+NR_FCC3,
+NR_FCC4,
+NR_FCC5,
+NR_FCC6,
+NR_FCC7

compiler/mips/rmipsrni.inc

@@ -71,5 +71,4 @@
 69,
 70,
 71,
-72,
-73
+72

compiler/mips/rmipssri.inc

@@ -1,9 +1,5 @@
 { don't edit, this file is generated from mipsreg.dat }
-68,
-66,
 0,
-67,
-65,
 5,
 6,
 7,
@@ -41,11 +37,14 @@
 40,
 41,
 42,
+65,
+66,
+67,
+68,
 69,
 70,
 71,
 72,
-73,
 31,
 29,
 27,

compiler/mips/rmipssta.inc

@@ -65,11 +65,10 @@
 62,
 63,
 -1,
-68,
-69,
-70,
-71,
-72,
-73,
-74,
-75
+-1,
+-1,
+-1,
+-1,
+-1,
+-1,
+-1

compiler/mips/rmipsstd.inc

@@ -64,12 +64,11 @@
 'f29',
 'f30',
 'f31',
-'PC',
-'HI',
-'LO',
-'CR',
-'fcr0',
-'fcr25',
-'fcr26',
-'fcr28',
-'fcsr'
+'fcc0',
+'fcc1',
+'fcc2',
+'fcc3',
+'fcc4',
+'fcc5',
+'fcc6',
+'fcc7'

compiler/mips/rmipssup.inc

@@ -64,12 +64,11 @@ RS_F28 = $1C;
 RS_F29 = $1D;
 RS_F30 = $1E;
 RS_F31 = $1F;
-RS_PC = $00;
-RS_HI = $01;
-RS_LO = $02;
-RS_CR = $03;
-RS_FCR0 = $04;
-RS_FCR25 = $05;
-RS_FCR26 = $06;
-RS_FCR28 = $07;
-RS_FCSR = $08;
+RS_FCC0 = $00;
+RS_FCC1 = $01;
+RS_FCC2 = $02;
+RS_FCC3 = $03;
+RS_FCC4 = $04;
+RS_FCC5 = $05;
+RS_FCC6 = $06;
+RS_FCC7 = $07;