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@@ -2183,15 +2183,15 @@ implementation
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begin
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begin
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if aInput.typ = top_ref then
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if aInput.typ = top_ref then
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begin
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begin
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- if aInput.ref^.base <> NR_NO then
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- begin
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- if (aInput.ref^.offset <> 0) and
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+ if aInput.ref^.base <> NR_NO then
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+ begin
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+ if (aInput.ref^.offset <> 0) and
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((aInput.ref^.offset mod tuplesize) = 0) and
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((aInput.ref^.offset mod tuplesize) = 0) and
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(abs(aInput.ref^.offset) div tuplesize <= 127) then
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(abs(aInput.ref^.offset) div tuplesize <= 127) then
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begin
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begin
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aInput.ref^.offset := aInput.ref^.offset div tuplesize;
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aInput.ref^.offset := aInput.ref^.offset div tuplesize;
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EVEXTupleState := etsIsTuple;
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EVEXTupleState := etsIsTuple;
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- end;
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+ end;
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end;
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end;
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end;
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end;
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end;
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end;
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@@ -2905,35 +2905,35 @@ implementation
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NR_EAX,
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NR_EAX,
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NR_XMM0,
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NR_XMM0,
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NR_YMM0,
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NR_YMM0,
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- NR_ZMM0: index:=0;
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+ NR_ZMM0: index:=0;
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NR_ECX,
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NR_ECX,
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NR_XMM1,
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NR_XMM1,
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NR_YMM1,
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NR_YMM1,
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- NR_ZMM1: index:=1;
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+ NR_ZMM1: index:=1;
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NR_EDX,
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NR_EDX,
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NR_XMM2,
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NR_XMM2,
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NR_YMM2,
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NR_YMM2,
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- NR_ZMM2: index:=2;
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+ NR_ZMM2: index:=2;
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NR_EBX,
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NR_EBX,
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NR_XMM3,
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NR_XMM3,
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NR_YMM3,
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NR_YMM3,
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- NR_ZMM3: index:=3;
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+ NR_ZMM3: index:=3;
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NR_NO,
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NR_NO,
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NR_XMM4,
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NR_XMM4,
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NR_YMM4,
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NR_YMM4,
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- NR_ZMM4: index:=4;
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+ NR_ZMM4: index:=4;
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NR_EBP,
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NR_EBP,
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NR_XMM5,
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NR_XMM5,
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NR_YMM5,
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NR_YMM5,
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- NR_ZMM5: index:=5;
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+ NR_ZMM5: index:=5;
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NR_ESI,
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NR_ESI,
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NR_XMM6,
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NR_XMM6,
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NR_YMM6,
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NR_YMM6,
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- NR_ZMM6: index:=6;
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+ NR_ZMM6: index:=6;
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NR_EDI,
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NR_EDI,
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NR_XMM7,
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NR_XMM7,
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NR_YMM7,
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NR_YMM7,
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- NR_ZMM7: index:=7;
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+ NR_ZMM7: index:=7;
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else
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else
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exit;
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exit;
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end;
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end;
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@@ -3507,7 +3507,7 @@ implementation
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* generates no code in the assembler)
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* generates no code in the assembler)
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* \331 - instruction not valid with REP prefix. Hint for
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* \331 - instruction not valid with REP prefix. Hint for
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* disassembler only; for SSE instructions.
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* disassembler only; for SSE instructions.
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- * \332 - disassemble a rep (0xF3 byte) prefix as repe not rep.
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+ * \332 - disassemble a rep (0xF3 byte) prefix as repe not rep.
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* \333 - 0xF3 prefix for SSE instructions
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* \333 - 0xF3 prefix for SSE instructions
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* \334 - 0xF2 prefix for SSE instructions
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* \334 - 0xF2 prefix for SSE instructions
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* \335 - Indicates 64-bit operand size with REX.W not necessary / 64-bit scalar vector operand size
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* \335 - Indicates 64-bit operand size with REX.W not necessary / 64-bit scalar vector operand size
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@@ -3678,7 +3678,7 @@ implementation
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{$endif i386}
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{$endif i386}
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objdata.writereloc(data,len,p,Reloctype);
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objdata.writereloc(data,len,p,Reloctype);
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{$ifdef x86_64}
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{$ifdef x86_64}
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- { Computed offset is not yet correct for GOTPC relocation }
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+ { Computed offset is not yet correct for GOTPC relocation }
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{ RELOC_GOTPCREL, RELOC_REX_GOTPCRELX, RELOC_GOTPCRELX need special handling }
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{ RELOC_GOTPCREL, RELOC_REX_GOTPCRELX, RELOC_GOTPCRELX need special handling }
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if assigned(p) and (RelocType in [RELOC_GOTPCREL, RELOC_REX_GOTPCRELX, RELOC_GOTPCRELX]) and
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if assigned(p) and (RelocType in [RELOC_GOTPCREL, RELOC_REX_GOTPCRELX, RELOC_GOTPCRELX]) and
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{ These relocations seem to be used only for ELF
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{ These relocations seem to be used only for ELF
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@@ -5538,14 +5538,14 @@ implementation
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// combination (attsuffix <> "AttSufNONE") and (MemRefSize is not in MemRefMultiples) is not supported =>> check opcode-definition in x86ins.dat
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// combination (attsuffix <> "AttSufNONE") and (MemRefSize is not in MemRefMultiples) is not supported =>> check opcode-definition in x86ins.dat
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if (AsmOp <> A_CVTSI2SD) and
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if (AsmOp <> A_CVTSI2SD) and
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- (AsmOp <> A_CVTSI2SS) then
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- begin
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+ (AsmOp <> A_CVTSI2SS) then
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+ begin
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inc(iCntOpcodeValError);
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inc(iCntOpcodeValError);
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Str(gas_needsuffix[AsmOp],hs1);
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Str(gas_needsuffix[AsmOp],hs1);
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Str(InsTabMemRefSizeInfoCache^[AsmOp].MemRefSize,hs2);
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Str(InsTabMemRefSizeInfoCache^[AsmOp].MemRefSize,hs2);
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Message3(asmr_e_not_supported_combination_attsuffix_memrefsize_type,
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Message3(asmr_e_not_supported_combination_attsuffix_memrefsize_type,
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std_op2str[AsmOp],hs1,hs2);
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std_op2str[AsmOp],hs1,hs2);
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- end;
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+ end;
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end;
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end;
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end;
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end;
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end;
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end;
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