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@@ -1899,7 +1899,7 @@ unit cgcpu;
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procedure tcgz80.g_concatcopy(list : TAsmList;const source,dest : treference;len : tcgint);
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var
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- countreg,tmpreg : tregister;
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+ countreg,tmpreg,srcreg,dstreg: tregister;
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srcref,dstref : treference;
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copysize,countregsize : tcgsize;
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l : TAsmLabel;
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@@ -1918,151 +1918,30 @@ unit cgcpu;
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list.concat(taicpu.op_ref_reg(A_LD,dest,tmpreg));
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end
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else
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- list.Concat(tai_comment.Create(strpnew('WARNING! not implemented: g_concatcopy')));
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- //if len>16 then
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- // begin
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- // current_asmdata.getjumplabel(l);
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- //
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- // reference_reset(srcref,source.alignment,source.volatility);
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- // reference_reset(dstref,dest.alignment,source.volatility);
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- // srcref.base:=NR_R30;
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- // srcref.addressmode:=AM_POSTINCREMENT;
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- // dstref.base:=NR_R26;
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- // dstref.addressmode:=AM_POSTINCREMENT;
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- //
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- // copysize:=OS_8;
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- // if len<256 then
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- // countregsize:=OS_8
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- // else if len<65536 then
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- // countregsize:=OS_16
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- // else
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- // internalerror(2011022007);
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- // countreg:=getintregister(list,countregsize);
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- // a_load_const_reg(list,countregsize,len,countreg);
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- // a_loadaddr_ref_reg(list,source,NR_R30);
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- //
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- // { only base or index register in dest? }
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- // if ((dest.addressmode=AM_UNCHANGED) and (dest.offset=0) and not(assigned(dest.symbol))) and
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- // ((dest.base<>NR_NO) xor (dest.index<>NR_NO)) then
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- // begin
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- // if dest.base<>NR_NO then
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- // tmpreg:=dest.base
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- // else if dest.index<>NR_NO then
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- // tmpreg:=dest.index
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- // else
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- // internalerror(2016112001);
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- // end
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- // else
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- // begin
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- // tmpreg:=getaddressregister(list);
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- // a_loadaddr_ref_reg(list,dest,tmpreg);
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- // end;
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- //
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- // { X is used for spilling code so we can load it
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- // only by a push/pop sequence, this can be
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- // optimized later on by the peephole optimizer
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- // }
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- // list.concat(taicpu.op_reg(A_PUSH,tmpreg));
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- // list.concat(taicpu.op_reg(A_PUSH,GetNextReg(tmpreg)));
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- // list.concat(taicpu.op_reg(A_POP,NR_R27));
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- // list.concat(taicpu.op_reg(A_POP,NR_R26));
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- // cg.a_label(list,l);
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- // list.concat(taicpu.op_reg_ref(GetLoad(srcref),NR_R0,srcref));
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- // list.concat(taicpu.op_ref_reg(GetStore(dstref),dstref,NR_R0));
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- // list.concat(taicpu.op_reg(A_DEC,countreg));
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- // a_jmp_flags(list,F_NE,l);
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- // // keep registers alive
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- // list.concat(taicpu.op_reg_reg(A_MOV,countreg,countreg));
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- // end
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- //else
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- // begin
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- // SrcQuickRef:=false;
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- // DestQuickRef:=false;
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- // if not((source.addressmode=AM_UNCHANGED) and
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- // (source.symbol=nil) and
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- // ((source.base=NR_R28) or
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- // (source.base=NR_R30)) and
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- // (source.Index=NR_NO) and
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- // (source.Offset in [0..64-len])) and
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- // not((source.Base=NR_NO) and (source.Index=NR_NO)) then
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- // srcref:=normalize_ref(list,source,NR_R30)
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- // else
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- // begin
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- // SrcQuickRef:=true;
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- // srcref:=source;
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- // end;
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- //
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- // if not((dest.addressmode=AM_UNCHANGED) and
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- // (dest.symbol=nil) and
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- // ((dest.base=NR_R28) or
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- // (dest.base=NR_R30)) and
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- // (dest.Index=NR_No) and
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- // (dest.Offset in [0..64-len])) and
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- // not((dest.Base=NR_NO) and (dest.Index=NR_NO)) then
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- // begin
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- // if not(SrcQuickRef) then
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- // begin
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- // { only base or index register in dest? }
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- // if ((dest.addressmode=AM_UNCHANGED) and (dest.offset=0) and not(assigned(dest.symbol))) and
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- // ((dest.base<>NR_NO) xor (dest.index<>NR_NO)) then
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- // begin
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- // if dest.base<>NR_NO then
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- // tmpreg:=dest.base
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- // else if dest.index<>NR_NO then
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- // tmpreg:=dest.index
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- // else
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- // internalerror(2016112002);
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- // end
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- // else
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- // tmpreg:=getaddressregister(list);
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- //
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- // dstref:=normalize_ref(list,dest,tmpreg);
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- //
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- // { X is used for spilling code so we can load it
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- // only by a push/pop sequence, this can be
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- // optimized later on by the peephole optimizer
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- // }
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- // list.concat(taicpu.op_reg(A_PUSH,tmpreg));
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- // list.concat(taicpu.op_reg(A_PUSH,GetNextReg(tmpreg)));
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- // list.concat(taicpu.op_reg(A_POP,NR_R27));
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- // list.concat(taicpu.op_reg(A_POP,NR_R26));
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- // dstref.base:=NR_R26;
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- // end
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- // else
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- // dstref:=normalize_ref(list,dest,NR_R30);
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- // end
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- // else
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- // begin
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- // DestQuickRef:=true;
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- // dstref:=dest;
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- // end;
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- //
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- // for i:=1 to len do
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- // begin
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- // if not(SrcQuickRef) and (i<len) then
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- // srcref.addressmode:=AM_POSTINCREMENT
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- // else
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- // srcref.addressmode:=AM_UNCHANGED;
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- //
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- // if not(DestQuickRef) and (i<len) then
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- // dstref.addressmode:=AM_POSTINCREMENT
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- // else
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- // dstref.addressmode:=AM_UNCHANGED;
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- //
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- // list.concat(taicpu.op_reg_ref(GetLoad(srcref),NR_R0,srcref));
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- // list.concat(taicpu.op_ref_reg(GetStore(dstref),dstref,NR_R0));
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- //
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- // if SrcQuickRef then
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- // inc(srcref.offset);
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- // if DestQuickRef then
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- // inc(dstref.offset);
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- // end;
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- // if not(SrcQuickRef) then
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- // begin
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- // ungetcpuregister(list,srcref.base);
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- // ungetcpuregister(list,GetNextReg(srcref.base));
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- // end;
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- // end;
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+ begin
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+ srcreg:=getintregister(list,OS_16);
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+ a_loadaddr_ref_reg(list,source,srcreg);
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+ dstreg:=getintregister(list,OS_16);
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+ a_loadaddr_ref_reg(list,dest,dstreg);
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+ getcpuregister(list,NR_L);
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+ a_load_reg_reg(list,OS_8,OS_8,srcreg,NR_L);
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+ getcpuregister(list,NR_H);
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+ a_load_reg_reg(list,OS_8,OS_8,GetNextReg(srcreg),NR_H);
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+ getcpuregister(list,NR_E);
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+ a_load_reg_reg(list,OS_8,OS_8,dstreg,NR_E);
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+ getcpuregister(list,NR_D);
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+ a_load_reg_reg(list,OS_8,OS_8,GetNextReg(dstreg),NR_D);
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+ getcpuregister(list,NR_B);
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+ getcpuregister(list,NR_C);
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+ list.concat(taicpu.op_reg_const(A_LD,NR_BC,len));
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+ list.concat(taicpu.op_none(A_LDIR));
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+ ungetcpuregister(list,NR_B);
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+ ungetcpuregister(list,NR_C);
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+ ungetcpuregister(list,NR_D);
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+ ungetcpuregister(list,NR_E);
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+ ungetcpuregister(list,NR_H);
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+ ungetcpuregister(list,NR_L);
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+ end;
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end;
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nickysn