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@@ -1649,6 +1649,7 @@ implementation
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procedure thlcgllvm.set_call_function_result(const list: TAsmList; const pd: tabstractprocdef; const llvmretdef, hlretdef: tdef; const resval: tregister; var retpara: tcgpara);
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var
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+ hreg: tregister;
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rettemp: treference;
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begin
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if not is_void(hlretdef) and
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@@ -1664,7 +1665,15 @@ implementation
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everything to memory rather than potentially dealing with aggregates
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in "registers" }
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tg.gethltemp(list, hlretdef, hlretdef.size, tt_normal, rettemp);
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- a_load_reg_ref(list, llvmretdef, hlretdef, resval, rettemp);
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+ case def2regtyp(llvmretdef) of
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+ R_INTREGISTER,
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+ R_ADDRESSREGISTER:
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+ a_load_reg_ref(list,llvmretdef,hlretdef,resval,rettemp);
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+ R_FPUREGISTER:
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+ a_loadfpu_reg_ref(list,llvmretdef,hlretdef,resval,rettemp);
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+ R_MMREGISTER:
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+ a_loadmm_reg_ref(list,llvmretdef,hlretdef,resval,rettemp,mms_movescalar);
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+ end;
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{ the return parameter now contains a value whose type matches the one
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that the high level code generator expects instead of the llvm shim
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}
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@@ -1681,8 +1690,23 @@ implementation
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end
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else
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begin
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+ if llvmretdef<>hlretdef then
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+ begin
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+ hreg:=getregisterfordef(list,hlretdef);
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+ case def2regtyp(llvmretdef) of
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+ R_INTREGISTER,
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+ R_ADDRESSREGISTER:
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+ a_load_reg_reg(list,llvmretdef,hlretdef,resval,hreg);
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+ R_FPUREGISTER:
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+ a_loadfpu_reg_reg(list,llvmretdef,hlretdef,resval,hreg);
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+ R_MMREGISTER:
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+ a_loadmm_reg_reg(list,llvmretdef,hlretdef,resval,hreg,mms_movescalar);
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+ end;
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+ retpara.location^.llvmloc.reg:=hreg
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+ end
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+ else
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+ retpara.location^.llvmloc.reg:=resval;
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retpara.Location^.llvmloc.loc:=retpara.location^.loc;
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- retpara.location^.llvmloc.reg:=resval;
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retpara.Location^.llvmvalueloc:=true;
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end;
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end
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