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Exclude AW flags for sec_fpc data for embedded and freertos targets.

ccrause 11 月之前
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d53a81e2d9
共有 3 個文件被更改,包括 6 次插入13 次删除
  1. 3 1
      compiler/aggas.pas
  2. 1 2
      compiler/systems/t_embed.pas
  3. 2 10
      compiler/systems/t_freertos.pas

+ 3 - 1
compiler/aggas.pas

@@ -571,7 +571,9 @@ implementation
              { sectionname may rename those sections, so we do not write flags/progbits for them,
              { sectionname may rename those sections, so we do not write flags/progbits for them,
                the assembler will ignore them/spite out a warning anyways }
                the assembler will ignore them/spite out a warning anyways }
              if not(atype in [sec_data,sec_rodata,sec_rodata_norel]) and
              if not(atype in [sec_data,sec_rodata,sec_rodata_norel]) and
-                not(asminfo^.id=as_solaris_as) then
+                not(asminfo^.id=as_solaris_as) and
+                not(atype=sec_fpc) and
+                not(target_info.system in (systems_embedded+systems_freertos)) then
                begin
                begin
                  usesectionflags:=true;
                  usesectionflags:=true;
                  usesectionprogbits:=true;
                  usesectionprogbits:=true;

+ 1 - 2
compiler/systems/t_embed.pas

@@ -1010,7 +1010,6 @@ begin
           Add('  fuse      (rw!x) : ORIGIN = 0x820000, LENGTH = 1K');
           Add('  fuse      (rw!x) : ORIGIN = 0x820000, LENGTH = 1K');
           Add('  lock      (rw!x) : ORIGIN = 0x830000, LENGTH = 1K');
           Add('  lock      (rw!x) : ORIGIN = 0x830000, LENGTH = 1K');
           Add('  signature (rw!x) : ORIGIN = 0x840000, LENGTH = 1K');
           Add('  signature (rw!x) : ORIGIN = 0x840000, LENGTH = 1K');
-          Add('  fpcinfo          : ORIGIN = 0xFF0000, LENGTH = 1K');
           Add('}');
           Add('}');
           Add('_stack_top = 0x' + IntToHex(srambase+sramsize-1,4) + ';');
           Add('_stack_top = 0x' + IntToHex(srambase+sramsize-1,4) + ';');
         end;
         end;
@@ -1271,7 +1270,7 @@ begin
       Add('  /* DWARF Extension.  */');
       Add('  /* DWARF Extension.  */');
       Add('  .debug_macro    0 : { *(.debug_macro) }');
       Add('  .debug_macro    0 : { *(.debug_macro) }');
       Add('  .debug_addr     0 : { *(.debug_addr) }');
       Add('  .debug_addr     0 : { *(.debug_addr) }');
-      Add('  .fpc (NOLOAD)     : { KEEP (*(.fpc .fpc.n_version .fpc.n_links)) } > fpcinfo');
+      Add('  .fpc              : { KEEP (*(.fpc .fpc.n_version .fpc.n_links)) }');
       Add('}');
       Add('}');
     end;
     end;
 {$endif AVR}
 {$endif AVR}

+ 2 - 10
compiler/systems/t_freertos.pas

@@ -840,16 +840,12 @@ begin
 {$ifdef RISCV32}
 {$ifdef RISCV32}
   with linkres do
   with linkres do
     begin
     begin
-      Add('MEMORY');
-      Add('{');
-      Add('  dummy : org = 0x0, len = 0x100');
-      Add('}');
       Add('SECTIONS');
       Add('SECTIONS');
       Add('{');
       Add('{');
       Add('  .data :');
       Add('  .data :');
       Add('  {');
       Add('  {');
       Add('    KEEP (*(.fpc .fpc.n_version .fpc.n_links))');
       Add('    KEEP (*(.fpc .fpc.n_version .fpc.n_links))');
-      Add('  } > dummy');
+      Add('  }');
       Add('}');
       Add('}');
     end;
     end;
 {$endif RISCV32}
 {$endif RISCV32}
@@ -857,16 +853,12 @@ begin
 {$ifdef XTENSA}
 {$ifdef XTENSA}
   with linkres do
   with linkres do
     begin
     begin
-      Add('MEMORY');
-      Add('{');
-      Add('  dummy : org = 0x0, len = 0x100');
-      Add('}');
       Add('SECTIONS');
       Add('SECTIONS');
       Add('{');
       Add('{');
       Add('  .data :');
       Add('  .data :');
       Add('  {');
       Add('  {');
       Add('    KEEP (*(.fpc .fpc.n_version .fpc.n_links))');
       Add('    KEEP (*(.fpc .fpc.n_version .fpc.n_links))');
-      Add('  } > dummy');
+      Add('  }');
       Add('}');
       Add('}');
     end;
     end;
 {$endif XTENSA}
 {$endif XTENSA}