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@@ -88,9 +88,14 @@ end;
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function SetExceptionMask(const Mask: TFPUExceptionMask): TFPUExceptionMask;
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const
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FPCToFPUExceptionFlags: array[TFPUException] of DWord =
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- ( FPU68K_EXCEPT_OPERR, 0, FPU68K_EXCEPT_DZ, FPU68K_EXCEPT_OVFL, FPU68K_EXCEPT_UNFL, FPU68K_EXCEPT_INEX2 );
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+ ( {exInvalidOp,} FPU68K_EXCEPT_OPERR or FPU68K_EXCEPT_SNAN or FPU68K_EXCEPT_BSUN,
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+ {exDenormalized,} 0,
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+ {exZeroDivide,} FPU68K_EXCEPT_DZ,
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+ {exOverflow,} FPU68K_EXCEPT_OVFL,
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+ {exUnderflow,} FPU68K_EXCEPT_UNFL,
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+ {exPrecision} FPU68K_EXCEPT_INEX1 or FPU68K_EXCEPT_INEX2 );
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FPUToFPCExceptionFlags: array[0..7] of TFPUExceptionMask =
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- ( [], [exPrecision], [exZeroDivide], [exUnderflow], [exOverflow], [exInvalidOp], [], [] );
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+ ( [exPrecision], [exPrecision], [exZeroDivide], [exUnderflow], [exOverflow], [exInvalidOp], [exInvalidOp], [exInvalidOp] );
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var
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oldMode, Mode: DWord;
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e: TFPUException;
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@@ -104,10 +109,13 @@ begin
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result:=result+FPUToFPCExceptionFlags[i];
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mode:=0;
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- for e in Mask do
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- mode:=mode or FPCToFPUExceptionFlags[e];
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+ { The bits set inside FPCR register are the enabled exceptions,
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+ not the masked exceptions, thus we need to invert list }
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+ for e:=low(TFPUException) to high(TFPUException) do
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+ if not (e in Mask) then
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+ mode:=mode or FPCToFPUExceptionFlags[e];
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- SetFPCR((GetFPCR and not FPU68K_EXCEPT_MASK) or (mode shl FPU68K_EXCEPT_MASK_SHIFT));
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+ SetFPCR((GetFPCR and not FPU68K_EXCEPT_MASK) or (mode and FPU68K_EXCEPT_MASK));
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softfloat_exception_mask:=mask;
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end;
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