* several errors in inline assembler fixed

rtl/powerpc/math.inc

@@ -84,17 +84,16 @@
       { output: result in r3 }
       assembler;
       var
-        temp:
-          record
+        temp: packed record
             case byte of
               0: (l1,l2: longint);
               1: (d: double);
           end;
       asm
         fctiwz   fr1,fr1
-        stfd     fr1,temp.d
-        lwz      r3,temp.l1
-        lwz      r4,temp.l2
+        stfd     fr1,temp
+        lwz      r3,temp
+        lwz      r4,4+temp
       end ['R3','F1'];
 
 
@@ -104,17 +103,16 @@
       { output: result in r3 }
       assembler;
       var
-        temp:
-          record
+        temp : packed record
             case byte of
               0: (l1,l2: longint);
               1: (d: double);
           end;
       asm
         fctiw    fr1,fr1
-        stfd     fr1,temp.d
-        lwz      r3,temp.l1
-        lwz      r4,temp.l2
+        stfd     fr1,temp
+        lwz      r3,temp
+        lwz      r4,4+temp
       end ['R3','F1'];
 
 
@@ -159,9 +157,9 @@
            if bas<0 then
             begin
               if odd(expo) then
-               power:=-round(exp(ln(-bas)*expo))
+                power:=-round(exp(ln(-bas)*expo))
               else
-               power:=round(exp(ln(-bas)*expo));
+                power:=round(exp(ln(-bas)*expo));
             end
            else
             power:=round(exp(ln(bas)*expo));
@@ -217,21 +215,20 @@ assembler;
 { input: high(i) in r3, low(i) in r4 }
 { output: double(i) in f0            }
 var
-  temp:
-    record
+  temp: packed record
       case byte of
         0: (l1,l2: cardinal);
         1: (d: double);
     end;
 asm
            lis    r0,$4330
-           stw    r0,temp.l1
+           stw    r0,temp
            xoris  r3,r3,$8000
-           stw    r3,temp.l2
+           stw    r3,4+temp
            lis    r3,longint_to_real_helper@ha
            lfd    fr1,longint_to_real_helper@l(r3)
-           lfd    fr0,temp.d
-           stw    r4,temp.l2
+           lfd    fr0,temp
+           stw    r4,4+temp
            fsub   fr0,fr0,fr1
            lis    r4,cardinal_to_real_helper@ha
            lfd    fr1,cardinal_to_real_helper@l(r4)
@@ -248,20 +245,19 @@ assembler;
 { input: high(q) in r3, low(q) in r4 }
 { output: double(q) in f0            }
 var
-  temp:
-    record
+  temp: packed record
       case byte of
         0: (l1,l2: cardinal);
         1: (d: double);
     end;
 asm
            lis    r0,$4330
-           stw    r0,temp.l1
-           stw    r3,temp.l2
-           lfd    fr0,temp.d
+           stw    r0,temp
+           stw    r3,4+temp
+           lfd    fr0,temp
            lis    r3,cardinal_to_real_helper@ha
            lfd    fr1,cardinal_to_real_helper@l(r3)
-           stw    r4,temp.l2
+           stw    r4,4+temp
            fsub   fr0,fr0,fr1
            lfd    fr3,temp
            lis    r3,int_to_real_factor@ha
@@ -274,7 +270,10 @@ end ['R0','R3','F0','F1','F2','F3'];
 
 {
   $Log$
-  Revision 1.8  2002-08-10 17:14:36  jonas
+  Revision 1.9  2002-08-18 21:37:48  florian
+    * several errors in inline assembler fixed
+
+  Revision 1.8  2002/08/10 17:14:36  jonas
     * various fixes, mostly changing the names of the modifies registers to
       upper case since that seems to be required by the compiler
 

rtl/powerpc/powerpc.inc

@@ -18,6 +18,101 @@
  **********************************************************************}
 
 
+{****************************************************************************
+                           PowerPC specific stuff
+****************************************************************************}
+
+{ This function is never called directly, it's a dummy to hold the register save/
+  load subroutines
+}
+procedure saverestorereg;assembler;
+asm
+{ exit }
+.global _restfpr_14_x
+_restfpr_14_x:  lfd     f14, -144(r11)
+.global _restfpr_15_x
+_restfpr_15_x:  lfd     f15, -136(r11)
+.global _restfpr_16_x
+_restfpr_16_x:  lfd     f16, -128(r11)
+.global _restfpr_17_x
+_restfpr_17_x:  lfd     f17, -120(r11)
+.global _restfpr_18_x
+_restfpr_18_x:  lfd     f18, -112(r11)
+.global _restfpr_19_x
+_restfpr_19_x:  lfd     f19, -104(r11)
+.global _restfpr_20_x
+_restfpr_20_x:  lfd     f20, -96(r11)
+.global _restfpr_21_x
+_restfpr_21_x:  lfd     f21, -88(r11)
+.global _restfpr_22_x
+_restfpr_22_x:  lfd     f22, -80(r11)
+.global _restfpr_23_x
+_restfpr_23_x:  lfd     f23, -72(r11)
+.global _restfpr_24_x
+_restfpr_24_x:  lfd     f24, -64(r11)
+.global _restfpr_25_x
+_restfpr_25_x:  lfd     f25, -56(r11)
+.global _restfpr_26_x
+_restfpr_26_x:  lfd     f26, -48(r11)
+.global _restfpr_27_x
+_restfpr_27_x:  lfd     f27, -40(r11)
+.global _restfpr_28_x
+_restfpr_28_x:  lfd     f28, -32(r11)
+.global _restfpr_29_x
+_restfpr_29_x:  lfd     f29, -24(r11)
+.global _restfpr_30_x
+_restfpr_30_x:  lfd     f30, -16(r11)
+.global _restfpr_31_x
+_restfpr_31_x:  lwz     r0, 4(r11)
+                lfd     f31, -8(r11)
+                mtlr    r0
+                ori     r1, r11, 0
+                blr
+
+{ exit with restoring lr }
+.global _restfpr_14_l
+_restfpr_14_l:  lfd     f14, -144(r11)
+.global _restfpr_15_l
+_restfpr_15_l:  lfd     f15, -136(r11)
+.global _restfpr_16_l
+_restfpr_16_l:  lfd     f16, -128(r11)
+.global _restfpr_17_l
+_restfpr_17_l:  lfd     f17, -120(r11)
+.global _restfpr_18_l
+_restfpr_18_l:  lfd     f18, -112(r11)
+.global _restfpr_19_l
+_restfpr_19_l:  lfd     f19, -104(r11)
+.global _restfpr_20_l
+_restfpr_20_l:  lfd     f20, -96(r11)
+.global _restfpr_21_l
+_restfpr_21_l:  lfd     f21, -88(r11)
+.global _restfpr_22_l
+_restfpr_22_l:  lfd     f22, -80(r11)
+.global _restfpr_23_l
+_restfpr_23_l:  lfd     f23, -72(r11)
+.global _restfpr_24_l
+_restfpr_24_l:  lfd     f24, -64(r11)
+.global _restfpr_25_l
+_restfpr_25_l:  lfd     f25, -56(r11)
+.global _restfpr_26_l
+_restfpr_26_l:  lfd     f26, -48(r11)
+.global _restfpr_27_l
+_restfpr_27_l:  lfd     f27, -40(r11)
+.global _restfpr_28_l
+_restfpr_28_l:  lfd     f28, -32(r11)
+.global _restfpr_29_l
+_restfpr_29_l:  lfd     f29, -24(r11)
+.global _restfpr_30_l
+_restfpr_30_l:  lfd     f30, -16(r11)
+.global _restfpr_31_l
+_restfpr_31_l:  lwz     r0, 4(r11)
+                lfd     f31, -8(r11)
+                mtlr    r0
+                ori     r1, r11, 0
+                blr
+end;
+
+
 {****************************************************************************
                                 Move / Fill
 ****************************************************************************}
@@ -187,7 +282,7 @@ Procedure FillChar(var x;count:longint;value:byte);assembler;
 { in the AIX ABI, we can use te red zone for temp storage, otherwise we have }
 { to explicitely allocate room                                               }
 var
-  temp: record
+  temp : packed record
     case byte of
       0: (l1,l2: longint);
       1: (d: double);
@@ -257,7 +352,7 @@ L32ByteAlignLoopDone:
         addi      r3,r3,4
 LFillCharDCBZLoop:
         dcbz      0,r3
-        add       r3,r3,32
+        addi      r3,r3,32
         bdnz      LFillCharDCBZLoop
         { if there was no rest, we're finished }
         beq       LFillCharDone
@@ -268,9 +363,9 @@ LFillCharNoZero:
         stw       r5,4(sp)
         lfd       f0,0(sp)
 {$else ABI_AIX}
-        stw       r5,temp.l1
-        stw       r5,temp.l2
-        lfd       f0,temp.d
+        stw       r5,temp
+        stw       r5,4+temp
+        lfd       f0,temp
 {$endif ABI_AIX}
         { make r3 point to address-8, so we're able to use fp double stores }
         { with update (it's already -4 now)                                 }
@@ -326,7 +421,6 @@ asm
         r18             scratch
         f1              value.value.value.value
 }
-        asm
                 cmpwi   cr0,r3,0
                 mtctr   r4
                 subi    r3,r3,4
@@ -648,11 +742,11 @@ asm
         { put length in ctr }
         mtctr   r3
         stb     r3,0(r5)
-        beq     LShortStrCopyDone
-LShortStrCopyLoop:
+        beq     LShortStrCopyDone2
+LShortStrCopyLoop2:
         lbzu    r0,1(r4)
         stbu    r0,1(r5)
-        bdnz    LShortStrCopyLoop
+        bdnz    LShortStrCopyLoop2
 end ['R0','R3','R4','R5','R10','CR0','CTR'];
 
 {$define FPC_SYSTEM_HAS_FPC_SHORTSTR_CONCAT}
@@ -833,7 +927,7 @@ LDecLockedLoop:
 {$else MT}
     lwzx    r10,0,r3
     subi    r10,r10,1
-    stw     r10,0,r3
+    stw     r10,0(r3)
 {$endif MT}
     mr.     r3,r10
 end ['R3','R10'];
@@ -849,14 +943,17 @@ LIncLockedLoop:
 {$else MT}
     lwzx    r10,0,r3
     addi    r10,r10,1
-    stw     r10,0,r3
+    stw     r10,0(r3)
 {$endif MT}
 end ['R3','R10'];
 
 
 {
   $Log$
-  Revision 1.12  2002-08-10 17:14:36  jonas
+  Revision 1.13  2002-08-18 21:37:48  florian
+    * several errors in inline assembler fixed
+
+  Revision 1.12  2002/08/10 17:14:36  jonas
     * various fixes, mostly changing the names of the modifies registers to
       upper case since that seems to be required by the compiler
 

rtl/powerpc/set.inc

@@ -99,7 +99,7 @@ Lset_set_byte_copy:
        // insert it
        or       r5,r4,r5
        // store result
-       stw      r5,(r3)
+       stw      r5,0(r3)
 end ['R0','R3','R4','R5','CTR'];
 
 
@@ -133,7 +133,7 @@ Lset_unset_byte_copy:
        // remove it
        andc     r5,r4,r5
        // store result
-       stw      r4,(r3)
+       stw      r4,0(r3)
 end ['R0','R3','R4','R5','CTR'];
 
 
@@ -176,7 +176,7 @@ Lset_set_range_copy:
                               //  current mask and adjust for hi bit
   subic. r9,r9,4              // bit hi in next longint?
   or     r5,r5,r10            // merge and
-  stw    r5,(r3)              // store current mask
+  stw    r5,0(r3)             // store current mask
   li     r10,-1               // new mask
   lwzu   r5,4(r3)             // load next longint of set
   beq    Lset_range_hi        // bit hi in this longint -> go to adjust for hi
@@ -194,7 +194,7 @@ Lset_range_hi:                // in all cases, r3 here contains the address of
                               //   taken)
   and    r10,r9,r10           // combine lo and hi bitmasks for this longint
   or     r5,r5,r10            // and combine with existing set
-  stw    r5,(r3)              // store to set
+  stw    r5,0(r3)             // store to set
 Lset_range_exit:
 end ['R0','R3','R4','R5','R6','R9','R10','CR0','CTR'];
 
@@ -523,7 +523,10 @@ end;
 
 {
   $Log$
-  Revision 1.12  2002-08-10 17:14:36  jonas
+  Revision 1.13  2002-08-18 21:37:48  florian
+    * several errors in inline assembler fixed
+
+  Revision 1.12  2002/08/10 17:14:36  jonas
     * various fixes, mostly changing the names of the modifies registers to
       upper case since that seems to be required by the compiler
 

rtl/powerpc/strlen.inc

@@ -20,13 +20,13 @@ asm
         {  load the begin of the string in the data cache }
         dcbt    0,r3
         { empty/invalid string? }
-        cmpli   r3,0
+        cmpli   cr0,r3,0
         { if yes, do nothing }
         beq     LStrLenDone
         subi    r29,r3,1
 LStrLenLoop:
         lbzu    r30,1(r29)
-        cmpli   r30,0
+        cmpli   cr0,r30,0
         bne     LStrLenLoop
         sub     r3,r29,r3
 LStrLenDone:
@@ -34,7 +34,10 @@ end ['R3','R4','R29','R30','CR0'];
 
 {
   $Log$
-  Revision 1.2  2002-08-10 17:14:36  jonas
+  Revision 1.3  2002-08-18 21:37:48  florian
+    * several errors in inline assembler fixed
+
+  Revision 1.2  2002/08/10 17:14:36  jonas
     * various fixes, mostly changing the names of the modifies registers to
       upper case since that seems to be required by the compiler
 
@@ -49,4 +52,4 @@ end ['R3','R4','R29','R30','CR0'];
       called anyway, while the ones for local vars have to be saved by the
       callee)
 
-}
+}

rtl/powerpc/strpas.inc

@@ -13,24 +13,24 @@
     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
 
  **********************************************************************}
-
+{
+   r3: result address
+   r4: src
+}
 asm
         {  load the begin of the string in the data cache }
-        dcbt    0,r3
-        { load result address in r9 }
-        li      r0,__RESULT@l
-        addis   r0,__RESULT@ha
+        dcbt    0,r4
         { maxlength }
         li      r10,255
         mtctr   r10
-        lwz     r0,0(r0)
+        lwz     r0,0(r3)
         { save address for at the end }
         mr      r3,r0
         { no "subi r0,r0,1" because the first byte = length byte }
         subi    r4,r4,1
 LStrPasLoop:
         lbzu    r10,1(r4)
-        cmpli   r10,0
+        cmpli   cr0,r10,0
         stbu    r10,1(r0)
         bdnzf   cr0*4+eq, LStrPasLoop
 
@@ -50,7 +50,10 @@ end ['R0','R3','R4','R10','CR0','CTR'];
 
 {
   $Log$
-  Revision 1.3  2002-08-10 17:14:36  jonas
+  Revision 1.4  2002-08-18 21:37:48  florian
+    * several errors in inline assembler fixed
+
+  Revision 1.3  2002/08/10 17:14:36  jonas
     * various fixes, mostly changing the names of the modifies registers to
       upper case since that seems to be required by the compiler
 
@@ -67,5 +70,4 @@ end ['R0','R3','R4','R10','CR0','CTR'];
       those reserved for local vars (since those have to be saved by the
       called anyway, while the ones for local vars have to be saved by the
       callee)
-
-}
+}