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@@ -325,8 +325,23 @@ unit cg64f32;
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reg.reglo:=reg.reghi;
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reg.reghi:=tmpreg;
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end;
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- cg.a_load_reg_ref(list,OS_32,OS_32,reg.reglo,ref);
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tmpref := ref;
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+{$if defined(cpu8bitalu) or defined(cpu16bitalu)}
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+ { Preload base and index to a separate temp register for 8 & 16 bit CPUs
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+ to reduce spilling and produce a better code. }
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+ if (tmpref.base<>NR_NO) and (getsupreg(tmpref.base)>=first_int_imreg) then
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+ begin
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+ tmpreg:=cg.getaddressregister(list);
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+ cg.a_load_reg_reg(list,OS_ADDR,OS_ADDR,tmpref.base,tmpreg);
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+ tmpref.base:=tmpreg;
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+ if tmpref.index<>NR_NO then
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+ begin
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+ cg.a_op_reg_reg(list,OP_ADD,OS_ADDR,tmpref.index,tmpref.base);
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+ tmpref.index:=NR_NO;
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+ end;
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+ end;
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+{$endif}
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+ cg.a_load_reg_ref(list,OS_32,OS_32,reg.reglo,tmpref);
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inc(tmpref.offset,4);
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cg.a_load_reg_ref(list,OS_32,OS_32,reg.reghi,tmpref);
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end;
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@@ -357,6 +372,21 @@ unit cg64f32;
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reg.reghi := tmpreg;
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end;
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tmpref := ref;
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+{$if defined(cpu8bitalu) or defined(cpu16bitalu)}
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+ { Preload base and index to a separate temp register for 8 & 16 bit CPUs
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+ to reduce spilling and produce a better code. }
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+ if (tmpref.base<>NR_NO) and (getsupreg(tmpref.base)>=first_int_imreg) then
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+ begin
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+ tmpreg:=cg.getaddressregister(list);
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+ cg.a_load_reg_reg(list,OS_ADDR,OS_ADDR,tmpref.base,tmpreg);
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+ tmpref.base:=tmpreg;
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+ if tmpref.index<>NR_NO then
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+ begin
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+ cg.a_op_reg_reg(list,OP_ADD,OS_ADDR,tmpref.index,tmpref.base);
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+ tmpref.index:=NR_NO;
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+ end;
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+ end;
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+{$endif}
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if (tmpref.base=reg.reglo) then
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begin
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tmpreg:=cg.getaddressregister(list);
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