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@@ -338,7 +338,7 @@ implementation
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cg.a_label(list,hl);
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end;
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else
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- cg.a_load_loc_reg(list,l,hregister);
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+ cg.a_load_loc_reg(list,OS_INT,l,hregister);
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end;
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{ reset hi part, take care of the signed bit of the current value }
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hregisterhi:=rg.getregisterint(list,OS_INT);
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@@ -451,16 +451,7 @@ implementation
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if (TCGSize2Size[dst_size]<TCGSize2Size[l.size]) then
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begin
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if (l.loc in [LOC_REGISTER,LOC_CREGISTER]) then
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- begin
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-{$ifndef i386}
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- hregisterhi := l.register;
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-{$endif not i386}
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- l.register.number:=(l.register.number and not $ff) or cgsize2subreg(dst_size);
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-{$ifndef i386}
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- { necessary for all processors that do not have subregisters (JM) }
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- cg.a_load_reg_reg(list,l.size,dst_size,hregisterhi,l.register);
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-{$endif not i386}
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- end;
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+ l.register.number:=(l.register.number and not $ff) or cgsize2subreg(dst_size);
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{ for big endian systems, the reference's offset must }
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{ be increased in this case, since they have the }
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{ MSB first in memory and e.g. byte(word_var) should }
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@@ -470,7 +461,7 @@ implementation
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inc(l.reference.offset,TCGSize2Size[l.size]-TCGSize2Size[dst_size]);
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l.size:=dst_size;
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end;
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- cg.a_load_loc_reg(list,l,hregister);
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+ cg.a_load_loc_reg(list,dst_size,l,hregister);
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{ Release old register when the superregister is changed }
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if (l.loc=LOC_REGISTER) and
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(l.register.number shr 8<>hregister.number shr 8) then
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@@ -482,7 +473,11 @@ implementation
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end;
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end;
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end;
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- location_reset(l,LOC_REGISTER,dst_size);
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+ if (l.loc <> LOC_CREGISTER) or
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+ not maybeconst then
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+ location_reset(l,LOC_REGISTER,dst_size)
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+ else
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+ location_reset(l,LOC_CREGISTER,dst_size);
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l.register:=hregister;
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end;
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end;
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@@ -521,7 +516,7 @@ implementation
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cg.a_label(list,hl);
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end;
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else
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- cg.a_load_loc_reg(list,l,hregister);
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+ cg.a_load_loc_reg(list,OS_INT,l,hregister);
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end;
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location_reset(l,LOC_REGISTER,dst_size);
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l.register:=hregister;
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@@ -579,7 +574,7 @@ implementation
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l.size:=dst_size;
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end;
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- cg.a_load_loc_reg(list,l,hregister);
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+ cg.a_load_loc_reg(list,dst_size,l,hregister);
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end;
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end;
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location_reset(l,LOC_REGISTER,dst_size);
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@@ -1348,13 +1343,22 @@ implementation
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case hp.paraloc.loc of
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LOC_CREGISTER,
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LOC_REGISTER:
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-// if not(hp.paraloc.size in [OS_S64,OS_64]) then
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- cg.a_load_reg_reg(list,hp.paraloc.size,OS_32,hp.paraloc.register,tvarsym(hp.parasym).reg);
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-// else
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+ if not(hp.paraloc.size in [OS_S64,OS_64]) then
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+ cg.a_load_reg_reg(list,hp.paraloc.size,hp.paraloc.size,hp.paraloc.register,tvarsym(hp.parasym).reg)
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+ else
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+ internalerror(2003053011);
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// cg64.a_load64_reg_reg(list,hp.paraloc.register64,tvarsym(hp.parasym).reg);
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LOC_CFPUREGISTER,
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LOC_FPUREGISTER:
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cg.a_loadfpu_reg_reg(list,hp.paraloc.register,tvarsym(hp.parasym).reg);
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+ LOC_REFERENCE,
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+ LOC_CREFERENCE:
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+ begin
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+ reference_reset_base(href,current_procinfo.framepointer,tvarsym(hp.parasym).adjusted_address);
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+ cg.a_load_ref_reg(list,hp.paraloc.size,href,tvarsym(hp.parasym).reg);
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+ end;
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+ else
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+ internalerror(2003053010);
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end
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else if (hp.paraloc.loc in [LOC_REGISTER,LOC_FPUREGISTER,LOC_MMREGISTER,
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LOC_CREGISTER,LOC_CFPUREGISTER,LOC_CMMREGISTER]) and
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@@ -1904,7 +1908,12 @@ implementation
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end.
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{
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$Log$
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- Revision 1.110 2003-05-30 18:52:10 jonas
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+ Revision 1.111 2003-05-30 23:49:18 jonas
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+ * a_load_loc_reg now has an extra size parameter for the destination
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+ register (properly fixes what I worked around in revision 1.106 of
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+ ncgutil.pas)
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+
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+ Revision 1.110 2003/05/30 18:52:10 jonas
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* fixed bug with intregvars
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* locapara.loc can also be LOC_CFPUREGISTER -> also fixed
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rcgppc.a_param_ref, which previously got bogus size values
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Jonas Maebe