+ eDSP instructions for arm

git-svn-id: trunk@6425 -

compiler/Makefile

@@ -3083,10 +3083,14 @@ msgtxt.inc: $(MSGFILE)
 	$(MAKE) $(MSG2INC)
 	$(MSG2INC) $(MSGFILE) msg msg
 msg: msgtxt.inc
-insdat: x86/x86ins.dat
+insdatx86 : x86/x86ins.dat
 	$(COMPILER) -FE$(COMPILERUTILSDIR) $(COMPILERUTILSDIR)/mkx86ins.pp
 	cd x86; ../utils/mkx86ins; mv -f *.inc ../i386
 	cd x86;../utils/mkx86ins x86_64; mv -f *.inc ../x86_64
+insdatarm : arm/armins.dat
+	$(COMPILER) -FE$(COMPILERUTILSDIR) $(COMPILERUTILSDIR)/mkarmins.pp
+	cd arm; ../utils/mkarmins
+insdat: insdatx86 insdatarm
 $(EXENAME) : $(wildcard *.pas) $(wildcard *.inc) msg \
 	     $(wildcard systems/*.pas) $(wilcard systems/*.inc) \
 	     $(wildcard $(PPC_TARGET)/*.pas) $(wildcard $(PPC_TARGET)/*.inc)

compiler/Makefile.fpc

@@ -350,11 +350,17 @@ msgtxt.inc: $(MSGFILE)
 
 msg: msgtxt.inc
 
-insdat: x86/x86ins.dat
+insdatx86 : x86/x86ins.dat
 	$(COMPILER) -FE$(COMPILERUTILSDIR) $(COMPILERUTILSDIR)/mkx86ins.pp
         cd x86; ../utils/mkx86ins; mv -f *.inc ../i386
         cd x86;../utils/mkx86ins x86_64; mv -f *.inc ../x86_64
 
+insdatarm : arm/armins.dat
+	$(COMPILER) -FE$(COMPILERUTILSDIR) $(COMPILERUTILSDIR)/mkarmins.pp
+        cd arm; ../utils/mkarmins
+
+insdat: insdatx86 insdatarm
+
 # Make only the compiler
 $(EXENAME) : $(wildcard *.pas) $(wildcard *.inc) msg \
              $(wildcard systems/*.pas) $(wilcard systems/*.inc) \

compiler/arm/armatt.inc

@@ -86,5 +86,30 @@
 'tst',
 'umlal',
 'umull',
-'wfs'
+'wfs',
+'ldrd',
+'mcrr',
+'mrrc',
+'pld',
+'qadd',
+'qdadd',
+'qdsub',
+'qsub',
+'smlabb',
+'smlabt',
+'smlatb',
+'smlatt',
+'smlalbb',
+'smlalbt',
+'smlaltb',
+'smlaltt',
+'smlawb',
+'smlawt',
+'smulbb',
+'smulbt',
+'smultb',
+'smultt',
+'smulwb',
+'smulwt',
+'strd'
 );

compiler/arm/armatts.inc

@@ -86,5 +86,30 @@ attsufNONE,
 attsufNONE,
 attsufNONE,
 attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
+attsufNONE,
 attsufNONE
 );

compiler/arm/armins.dat

@@ -237,8 +237,8 @@ reg32,mem32         \320\301\1\x13\110            ARM7
 reg32,reg32,reg32,reg32  \x15\x00\x20\x90               ARM7
 
 [MOVcc]
-reg32,shifterop              \x8\x0\0xd                   ARM7
-reg32,immshifter             \x8\x0\0xd                  ARM7
+; reg32,shifterop              \x8\x0\0xd                   ARM7
+; reg32,immshifter             \x8\x0\0xd                  ARM7
 ; reg32,reg32,reg32        \x9\x1\xA0                     ARM7
 ; reg32,reg32,imm          \xA\x1\xA0                     ARM7
 ; reg32,imm                \xB\x3\xA0                     ARM7
@@ -266,10 +266,10 @@ fpureg,fpureg              \xF2                      FPA
 fpureg,immfpu              \xF2                      FPA
 
 [MVNcc]
-reg32,reg32         \x8\x0\0xf                     ARM7
-reg32,reg32,reg32   \x9\x1\xE0                     ARM7
-reg32,reg32,imm     \xA\x1\xE0                     ARM7
-reg32,imm           \xB\x3\xE0                     ARM7
+; reg32,reg32         \x8\x0\0xf                     ARM7
+; reg32,reg32,reg32   \x9\x1\xE0                     ARM7
+; reg32,reg32,imm     \xA\x1\xE0                     ARM7
+; reg32,imm           \xB\x3\xE0                     ARM7
 
 [ORRcc]
 reg32,reg32,reg32        \4\x1\x80                     ARM7
@@ -392,3 +392,54 @@ reg32,reg32,reg32,reg32  \x16\x00\x80\x90		 ARM7
 
 [WFScc]
 
+; EDSP instructions
+[LDRDcc]
+
+[MCRRcc]
+
+[MRRCcc]
+
+[PLD]
+
+[QADDcc]
+
+[QDADDcc]
+
+[QDSUBcc]
+
+[QSUBcc]
+
+[SMLABBcc]
+
+[SMLABTcc]
+
+[SMLATBcc]
+
+[SMLATTcc]
+
+[SMLALBBcc]
+
+[SMLALBTcc]
+
+[SMLALTBcc]
+
+[SMLALTTcc]
+
+[SMLAWBcc]
+
+[SMLAWTcc]
+
+[SMULBBcc]
+
+[SMULBTcc]
+
+[SMULTBcc]
+
+[SMULTTcc]
+
+[SMULWBcc]
+
+[SMULWTcc]
+
+[STRDcc]
+

compiler/arm/armnop.inc

@@ -1,2 +1,2 @@
 { don't edit, this file is generated from armins.dat }
-108;
+102;

compiler/arm/armop.inc

@@ -86,5 +86,30 @@ A_TEQ,
 A_TST,
 A_UMLAL,
 A_UMULL,
-A_WFS
+A_WFS,
+A_LDRD,
+A_MCRR,
+A_MRRC,
+A_PLD,
+A_QADD,
+A_QDADD,
+A_QDSUB,
+A_QSUB,
+A_SMLABB,
+A_SMLABT,
+A_SMLATB,
+A_SMLATT,
+A_SMLALBB,
+A_SMLALBT,
+A_SMLALTB,
+A_SMLALTT,
+A_SMLAWB,
+A_SMLAWT,
+A_SMULBB,
+A_SMULBT,
+A_SMULTB,
+A_SMULTT,
+A_SMULWB,
+A_SMULWT,
+A_STRD
 );

compiler/arm/armtab.inc

@@ -399,20 +399,6 @@
     code    : #21#0#32#144;
     flags   : if_arm7
   ),
-  (
-    opcode  : A_MOV;
-    ops     : 2;
-    optypes : (ot_reg32,ot_shifterop,ot_none,ot_none);
-    code    : #8#1#160;
-    flags   : if_arm7
-  ),
-  (
-    opcode  : A_MOV;
-    ops     : 2;
-    optypes : (ot_reg32,ot_immediateshifter,ot_none,ot_none);
-    code    : #8#1#160;
-    flags   : if_arm7
-  ),
   (
     opcode  : A_MUL;
     ops     : 3;
@@ -434,34 +420,6 @@
     code    : #242;
     flags   : if_fpa
   ),
-  (
-    opcode  : A_MVN;
-    ops     : 2;
-    optypes : (ot_reg32,ot_reg32,ot_none,ot_none);
-    code    : #8#1#224;
-    flags   : if_arm7
-  ),
-  (
-    opcode  : A_MVN;
-    ops     : 3;
-    optypes : (ot_reg32,ot_reg32,ot_reg32,ot_none);
-    code    : #9#1#224;
-    flags   : if_arm7
-  ),
-  (
-    opcode  : A_MVN;
-    ops     : 3;
-    optypes : (ot_reg32,ot_reg32,ot_immediate,ot_none);
-    code    : #10#1#224;
-    flags   : if_arm7
-  ),
-  (
-    opcode  : A_MVN;
-    ops     : 2;
-    optypes : (ot_reg32,ot_immediate,ot_none,ot_none);
-    code    : #11#3#224;
-    flags   : if_arm7
-  ),
   (
     opcode  : A_ORR;
     ops     : 3;

compiler/utils/mkarmins.pp

@@ -20,7 +20,6 @@ const
 var
    s : string;
    i : longint;
-   x86_64 : boolean;
 
     function lower(const s : string) : string;
     {