+ added Risc-V register information file generation to the compiler Makefile

  * more stringent naming of register file information for Risc-V

compiler/Makefile

@@ -5062,7 +5062,15 @@ regdatz80 : z80/z80reg.dat
 regdatwasm : wasm32/wasmreg.dat
 	    $(COMPILER) -FE$(COMPILERUTILSDIR) $(COMPILERUTILSDIR)/mkwasmreg.pp
 	cd wasm32 && ..$(PATHSEP)utils$(PATHSEP)mkwasmreg$(SRCEXEEXT)
-regdat : regdatx86 regdatarm regdatsp regdatavr regdataarch64 regdatmips regdatsp64 regdatz80 regdatwasm
+regdatrv32 : riscv/rvreg.dat
+	    $(COMPILER) -FE$(COMPILERUTILSDIR) $(COMPILERUTILSDIR)/mkrvreg.pp
+	cd riscv && ..$(PATHSEP)utils$(PATHSEP)mkrvreg$(SRCEXEEXT) riscv32
+		mv -f riscv/rrv32*.inc riscv32
+regdatrv64 : riscv/rvreg.dat
+	    $(COMPILER) -FE$(COMPILERUTILSDIR) $(COMPILERUTILSDIR)/mkrvreg.pp
+	cd riscv && ..$(PATHSEP)utils$(PATHSEP)mkrvreg$(SRCEXEEXT) riscv64
+		mv -f riscv/rrv64*.inc riscv64
+regdat : regdatx86 regdatarm regdatsp regdatavr regdataarch64 regdatmips regdatsp64 regdatz80 regdatwasm regdatrv32 regdatrv64
 intrdatx86 : x86/x86intr.dat
 		$(COMPILER) -FE$(COMPILERUTILSDIR) $(COMPILERUTILSDIR)/mkx86inl.pp
 	cd x86 && ..$(PATHSEP)utils$(PATHSEP)mkx86inl$(SRCEXEEXT)

compiler/Makefile.fpc

@@ -829,7 +829,17 @@ regdatwasm : wasm32/wasmreg.dat
 	    $(COMPILER) -FE$(COMPILERUTILSDIR) $(COMPILERUTILSDIR)/mkwasmreg.pp
         cd wasm32 && ..$(PATHSEP)utils$(PATHSEP)mkwasmreg$(SRCEXEEXT)
 
-regdat : regdatx86 regdatarm regdatsp regdatavr regdataarch64 regdatmips regdatsp64 regdatz80 regdatwasm
+regdatrv32 : riscv/rvreg.dat
+            $(COMPILER) -FE$(COMPILERUTILSDIR) $(COMPILERUTILSDIR)/mkrvreg.pp
+        cd riscv && ..$(PATHSEP)utils$(PATHSEP)mkrvreg$(SRCEXEEXT) riscv32
+		mv -f riscv/rrv32*.inc riscv32
+
+regdatrv64 : riscv/rvreg.dat
+            $(COMPILER) -FE$(COMPILERUTILSDIR) $(COMPILERUTILSDIR)/mkrvreg.pp
+        cd riscv && ..$(PATHSEP)utils$(PATHSEP)mkrvreg$(SRCEXEEXT) riscv64
+		mv -f riscv/rrv64*.inc riscv64
+
+regdat : regdatx86 regdatarm regdatsp regdatavr regdataarch64 regdatmips regdatsp64 regdatz80 regdatwasm regdatrv32 regdatrv64
 
 intrdatx86 : x86/x86intr.dat
 		$(COMPILER) -FE$(COMPILERUTILSDIR) $(COMPILERUTILSDIR)/mkx86inl.pp

compiler/riscv/cpubase.pas

@@ -145,6 +145,7 @@ uses
                                   Registers
 *****************************************************************************}
 
+{$ifdef riscv32}
     type
       { Number of registers used for indexing in tables }
       tregisterindex=0..{$i rrv32nor.inc}-1;
@@ -184,6 +185,49 @@ uses
       regdwarf_table : array[tregisterindex] of shortint = (
         {$i rrv32dwa.inc}
       );
+{$endif riscv32}
+
+{$ifdef riscv64}
+    type
+      { Number of registers used for indexing in tables }
+      tregisterindex=0..{$i rrv64nor.inc}-1;
+
+    const
+      maxvarregs = 32-6; { 32 int registers - r0 - stackpointer - r2 - 3 scratch registers }
+      maxfpuvarregs = 28; { 32 fpuregisters - some scratch registers (minimally 2) }
+      { Available Superregisters }
+      {$i rrv64sup.inc}
+
+      { No Subregisters }
+      R_SUBWHOLE=R_SUBNONE;
+
+      { Available Registers }
+      {$i rrv64con.inc}
+
+      { Integer Super registers first and last }
+      first_int_imreg = $20;
+
+      { Float Super register first and last }
+      first_fpu_imreg     = $20;
+
+      { MM Super register first and last }
+      first_mm_imreg     = $20;
+
+{ TODO: Calculate bsstart}
+      regnumber_count_bsstart = 64;
+
+      regnumber_table : array[tregisterindex] of tregister = (
+        {$i rrv64num.inc}
+      );
+
+      regstabs_table : array[tregisterindex] of shortint = (
+        {$i rrv64sta.inc}
+      );
+
+      regdwarf_table : array[tregisterindex] of shortint = (
+        {$i rrv64dwa.inc}
+      );
+{$endif riscv32}
 
 {*****************************************************************************
                                 Conditions
@@ -274,9 +318,17 @@ uses
                                GDB Information
 *****************************************************************************}
 
+{$ifdef riscv32}
       stab_regindex : array[tregisterindex] of shortint = (
         {$i rrv32sta.inc}
       );
+{$endif riscv32}
+
+{$ifdef riscv64}
+      stab_regindex : array[tregisterindex] of shortint = (
+        {$i rrv64sta.inc}
+      );
+{$endif riscv64}
 
 {*****************************************************************************
                           Generic Register names
@@ -394,6 +446,7 @@ implementation
     uses
       rgbase,verbose;
 
+{$ifdef riscv32}
     const
       std_regname_table : TRegNameTable = (
         {$i rrv32std.inc}
@@ -406,7 +459,22 @@ implementation
       std_regname_index : array[tregisterindex] of tregisterindex = (
         {$i rrv32sri.inc}
       );
+{$endif riscv32}
+
+{$ifdef riscv64}
+    const
+      std_regname_table : TRegNameTable = (
+        {$i rrv64std.inc}
+      );
 
+      regnumber_index : array[tregisterindex] of tregisterindex = (
+        {$i rrv64rni.inc}
+      );
+
+      std_regname_index : array[tregisterindex] of tregisterindex = (
+        {$i rrv64sri.inc}
+      );
+{$endif riscv64}
 
 {*****************************************************************************
                                   Helpers

compiler/riscv/itcpugas.pas

@@ -130,6 +130,7 @@ unit itcpugas;
       cutils,verbose, systems,
       rgbase;
 
+{$ifdef riscv32}
     const
       gas_regname_table : TRegNameTable = (
         {$i rrv32std.inc}
@@ -138,7 +139,18 @@ unit itcpugas;
       gas_regname_index : array[tregisterindex] of tregisterindex = (
         {$i rrv32sri.inc}
       );
+{$endif riscv32}
 
+{$ifdef riscv64}
+    const
+      gas_regname_table : TRegNameTable = (
+        {$i rrv64std.inc}
+      );
+
+      gas_regname_index : array[tregisterindex] of tregisterindex = (
+        {$i rrv64sri.inc}
+      );
+{$endif riscv64}
 
     function findreg_by_gasname(const s:string):tregisterindex;
       var

compiler/utils/mkrvreg.pp

@@ -24,6 +24,8 @@ var s : string;
     line : longint;
     regcount:byte;
     regcount_bsstart:byte;
+  	riscv64 : boolean;
+    fileprefix : string;
     names,
     regtypes,
     subtypes,
@@ -149,13 +151,13 @@ begin
 end;
 
 
-procedure read_spreg_file;
+procedure read_rvreg_file;
 
 var infile:text;
 
 begin
    { open dat file }
-   assign(infile,'rv32reg.dat');
+   assign(infile,'rvreg.dat');
    reset(infile);
    while not(eof(infile)) do
      begin
@@ -215,15 +217,15 @@ var
 
 begin
   { create inc files }
-  openinc(confile,'rrv32con.inc');
-  openinc(supfile,'rrv32sup.inc');
-  openinc(numfile,'rrv32num.inc');
-  openinc(stdfile,'rrv32std.inc');
-  openinc(stabfile,'rrv32sta.inc');
-  openinc(dwarffile,'rrv32dwa.inc');
-  openinc(norfile,'rrv32nor.inc');
-  openinc(rnifile,'rrv32rni.inc');
-  openinc(srifile,'rrv32sri.inc');
+  openinc(confile,'rrv'+fileprefix+'con.inc');
+  openinc(supfile,'rrv'+fileprefix+'sup.inc');
+  openinc(numfile,'rrv'+fileprefix+'num.inc');
+  openinc(stdfile,'rrv'+fileprefix+'std.inc');
+  openinc(stabfile,'rrv'+fileprefix+'sta.inc');
+  openinc(dwarffile,'rrv'+fileprefix+'dwa.inc');
+  openinc(norfile,'rrv'+fileprefix+'nor.inc');
+  openinc(rnifile,'rrv'+fileprefix+'rni.inc');
+  openinc(srifile,'rrv'+fileprefix+'sri.inc');
   first:=true;
   for i:=0 to regcount-1 do
     begin
@@ -266,7 +268,19 @@ begin
    writeln('Register Table Converter Version ',Version);
    line:=0;
    regcount:=0;
-   read_spreg_file;
+   riscv64:=paramstr(1)='riscv64';
+   fileprefix:='';
+   if riscv64 then
+     begin
+       fileprefix:='64';
+       writeln('Processing for CPU Risc-V 64');
+     end
+   else
+     begin
+       fileprefix:='32';
+       writeln('Processing for CPU Risc-V 32');
+     end;  
+   read_rvreg_file;
    regcount_bsstart:=1;
    while 2*regcount_bsstart<regcount do
      regcount_bsstart:=regcount_bsstart*2;