* case of identifiers fixed

* x86-64 uses also the mov $0,... -> xor optimization

git-svn-id: trunk@33553 -

compiler/i386/aoptcpu.pas

@@ -2603,14 +2603,7 @@ begin
                     end;
                 end;
               A_MOV:
-                if MatchOperand(taicpu(p).oper[0]^,0) and
-                   (taicpu(p).oper[1]^.typ = Top_Reg) and
-                   not(RegInUsedRegs(NR_DEFAULTFLAGS,UsedRegs)) then
-                  { change "mov $0, %reg" into "xor %reg, %reg" }
-                  begin
-                    taicpu(p).opcode := A_XOR;
-                    taicpu(p).loadReg(0,taicpu(p).oper[1]^.reg);
-                  end;
+                PostPeepholeOpMov(p);
               A_MOVZX:
                 { if register vars are on, it's possible there is code like }
                 {   "cmpl $3,%eax; movzbl 8(%ebp),%ebx; je .Lxxx"           }

compiler/x86/aasmcpu.pas

@@ -3419,9 +3419,9 @@ implementation
                  (oper[0]^.reg=oper[1]^.reg)
                 ) or
                 (((opcode=A_MOVSS) or (opcode=A_MOVSD) or (opcode=A_MOVQ) or
-                  (opcode=A_MOVAPS) or (OPCODE=A_MOVAPD) or
+                  (opcode=A_MOVAPS) or (opcode=A_MOVAPD) or
                   (opcode=A_VMOVSS) or (opcode=A_VMOVSD) or (opcode=A_VMOVQ) or
-                  (opcode=A_VMOVAPS) or (OPCODE=A_VMOVAPD)) and
+                  (opcode=A_VMOVAPS) or (opcode=A_VMOVAPD)) and
                  (regtype = R_MMREGISTER) and
                  (ops=2) and
                  (oper[0]^.typ=top_reg) and

compiler/x86/aoptx86.pas

@@ -37,6 +37,8 @@ unit aoptx86;
     type
       TX86AsmOptimizer = class(TAsmOptimizer)
         function RegLoadedWithNewValue(reg : tregister; hp : tai) : boolean; override;
+      protected
+        procedure PostPeepholeOpMov(const p : tai);
       end;
 
     function MatchInstruction(const instr: tai; const op: TAsmOp; const opsize: topsizes): boolean;
@@ -188,5 +190,17 @@ unit aoptx86;
       end;
 
 
+    procedure TX86AsmOptimizer.PostPeepholeOpMov(const p : tai);
+      begin
+       if MatchOperand(taicpu(p).oper[0]^,0) and
+          (taicpu(p).oper[1]^.typ = Top_Reg) and
+          not(RegInUsedRegs(NR_DEFAULTFLAGS,UsedRegs)) then
+         { change "mov $0, %reg" into "xor %reg, %reg" }
+         begin
+           taicpu(p).opcode := A_XOR;
+           taicpu(p).loadReg(0,taicpu(p).oper[1]^.reg);
+         end;
+      end;
+
 end.
 

compiler/x86_64/aoptcpu.pas

@@ -32,6 +32,7 @@ uses cgbase, cpubase, aasmtai, aopt, aoptx86, aoptcpub;
 type
   TCpuAsmOptimizer = class(TX86AsmOptimizer)
     function PeepHoleOptPass1Cpu(var p: tai): boolean; override;
+    function PostPeepHoleOptsCpu(var p : tai) : boolean; override;
   end;
 
 implementation
@@ -607,6 +608,22 @@ begin
     end;
 end;
 
+
+    function TCpuAsmOptimizer.PostPeepHoleOptsCpu(var p: tai): boolean;
+      begin
+        result := false;
+        case p.typ of
+          ait_instruction:
+            begin
+              case taicpu(p).opcode of
+                A_MOV:
+                  PostPeepholeOpMov(p);
+              end;
+            end;
+        end;
+      end;
+
+
 begin
   casmoptimizer := TCpuAsmOptimizer;
 end.