* x86-64: Improved shift/rotate code generation, taking advantage of byte-sized registers being available for all

compiler/x86/cgx86.pas

@@ -2316,8 +2316,8 @@ unit cgx86;
     procedure tcgx86.a_op_reg_reg(list : TAsmList; Op: TOpCG; size: TCGSize; src, dst: TRegister);
       const
 {$if defined(cpu64bitalu)}
-        REGCX=NR_RCX;
-        REGCX_Size = OS_64;
+        REGCX=NR_CL;
+        REGCX_Size = OS_8;
 {$elseif defined(cpu32bitalu)}
         REGCX=NR_ECX;
         REGCX_Size = OS_32;
@@ -2406,8 +2406,8 @@ unit cgx86;
     procedure tcgx86.a_op_reg_ref(list : TAsmList; Op: TOpCG; size: TCGSize;reg: TRegister; const ref: TReference);
       const
 {$if defined(cpu64bitalu)}
-        REGCX=NR_RCX;
-        REGCX_Size = OS_64;
+        REGCX=NR_CL;
+        REGCX_Size = OS_8;
 {$elseif defined(cpu32bitalu)}
         REGCX=NR_ECX;
         REGCX_Size = OS_32;