+ support for arm special registers

git-svn-id: trunk@12611 -

compiler/arm/aasmcpu.pas

@@ -87,6 +87,7 @@ uses
       OT_REG32     = $00201004;
       OT_REG64     = $00201008;
       OT_VREG      = $00201010;  { vector register }
+      OT_REGF      = $00201020;  { coproc register }
       OT_MEMORY    = $00204000;  { register number in 'basereg'  }
       OT_MEM8      = $00204001;
       OT_MEM16     = $00204002;

compiler/arm/armreg.dat

@@ -82,3 +82,6 @@ D14,$03,$00,d14,0,0
 S30,$03,$00,s20,0,0
 S31,$03,$00,s21,0,0
 D15,$03,$00,d15,0,0
+
+; special registers
+CPSR_C,$04,$00,cpsr_c,0,0

compiler/arm/rarmcon.inc

@@ -72,3 +72,4 @@ NR_D14 = tregister($03000000);
 NR_S30 = tregister($03000000);
 NR_S31 = tregister($03000000);
 NR_D15 = tregister($03000000);
+NR_CPSR_C = tregister($04000000);

compiler/arm/rarmdwa.inc

@@ -71,4 +71,5 @@
 0,
 0,
 0,
+0,
 0

compiler/arm/rarmnor.inc

@@ -1,2 +1,2 @@
 { don't edit, this file is generated from armreg.dat }
-73
+74

compiler/arm/rarmnum.inc

@@ -71,4 +71,5 @@ tregister($03000000),
 tregister($03000000),
 tregister($03000000),
 tregister($03000000),
-tregister($03000000)
+tregister($03000000),
+tregister($04000000)

compiler/arm/rarmrni.inc

@@ -71,4 +71,5 @@
 69,
 70,
 71,
-72
+72,
+73

compiler/arm/rarmsri.inc

@@ -1,5 +1,6 @@
 { don't edit, this file is generated from armreg.dat }
 0,
+73,
 27,
 30,
 57,

compiler/arm/rarmsta.inc

@@ -71,4 +71,5 @@
 0,
 0,
 0,
+0,
 0

compiler/arm/rarmstd.inc

@@ -71,4 +71,5 @@
 'd14',
 's20',
 's21',
-'d15'
+'d15',
+'cpsr_c'

compiler/arm/rarmsup.inc

@@ -72,3 +72,4 @@ RS_D14 = $00;
 RS_S30 = $00;
 RS_S31 = $00;
 RS_D15 = $00;
+RS_CPSR_C = $00;