+ added an optimized implementation of a_op64_reg_ref for i8086; this improves

  the generated code on i8086 for things like inc(int64_var,int64_var) and
  dec(int64_var,int64_var)

git-svn-id: trunk@35657 -

compiler/i8086/cgcpu.pas

@@ -103,6 +103,7 @@ unit cgcpu;
 
       tcg64f8086 = class(tcg64f32)
         procedure a_op64_ref_reg(list : TAsmList;op:TOpCG;size : tcgsize;const ref : treference;reg : tregister64);override;
+        procedure a_op64_reg_ref(list : TAsmList;op:TOpCG;size : tcgsize;reg : tregister64; const ref: treference);override;
         procedure a_op64_reg_reg(list : TAsmList;op:TOpCG;size : tcgsize;regsrc,regdst : tregister64);override;
         procedure a_op64_const_reg(list : TAsmList;op:TOpCG;size : tcgsize;value : int64;reg : tregister64);override;
         procedure a_op64_const_ref(list : TAsmList;op:TOpCG;size : tcgsize;value : int64;const ref : treference);override;
@@ -2321,6 +2322,29 @@ unit cgcpu;
       end;
 
 
+    procedure tcg64f8086.a_op64_reg_ref(list : TAsmList;op:TOpCG;size : tcgsize;reg : tregister64; const ref: treference);
+      var
+        op1,op2 : TAsmOp;
+        tempref : treference;
+      begin
+        if not(op in [OP_NEG,OP_NOT]) then
+          begin
+            get_64bit_ops(op,op1,op2);
+            tempref:=ref;
+            tcgx86(cg).make_simple_ref(list,tempref);
+            list.concat(taicpu.op_reg_ref(op1,S_W,reg.reglo,tempref));
+            inc(tempref.offset,2);
+            list.concat(taicpu.op_reg_ref(op2,S_W,GetNextReg(reg.reglo),tempref));
+            inc(tempref.offset,2);
+            list.concat(taicpu.op_reg_ref(op2,S_W,reg.reghi,tempref));
+            inc(tempref.offset,2);
+            list.concat(taicpu.op_reg_ref(op2,S_W,GetNextReg(reg.reghi),tempref));
+          end
+        else
+          inherited;
+      end;
+
+
     procedure tcg64f8086.a_op64_reg_reg(list : TAsmList;op:TOpCG;size : tcgsize;regsrc,regdst : tregister64);
       var
         op1,op2 : TAsmOp;