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+{
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+ Copyright (c) 2008 by Florian Klaempfl
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+
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+ Code generation for add nodes on the AVR
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+
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+ This program is free software; you can redistribute it and/or modify
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+ it under the terms of the GNU General Public License as published by
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+ the Free Software Foundation; either version 2 of the License, or
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+ (at your option) any later version.
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+
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+ This program is distributed in the hope that it will be useful,
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+ but WITHOUT ANY WARRANTY; without even the implied warranty of
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+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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+ GNU General Public License for more details.
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+
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+ You should have received a copy of the GNU General Public License
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+ along with this program; if not, write to the Free Software
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+ Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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+
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+ ****************************************************************************
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+}
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+unit navradd;
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+
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+{$i fpcdefs.inc}
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+
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+interface
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+
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+ uses
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+ node,ncgadd,cpubase;
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+
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+ type
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+ tavraddnode = class(tcgaddnode)
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+ private
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+ function GetResFlags(unsigned:Boolean):TResFlags;
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+ protected
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+ function pass_1 : tnode;override;
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+ procedure second_cmpordinal;override;
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+ procedure second_cmpsmallset;override;
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+ procedure second_cmp64bit;override;
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+ end;
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+
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+ implementation
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+
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+ uses
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+ globtype,systems,
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+ cutils,verbose,globals,
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+ symconst,symdef,paramgr,
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+ aasmbase,aasmtai,aasmdata,aasmcpu,defutil,htypechk,
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+ cgbase,cgutils,cgcpu,
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+ cpuinfo,pass_1,pass_2,regvars,procinfo,
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+ cpupara,
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+ ncon,nset,nadd,
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+ ncgutil,tgobj,rgobj,rgcpu,cgobj,cg64f32;
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+
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+{*****************************************************************************
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+ TSparcAddNode
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+*****************************************************************************}
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+
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+ function tavraddnode.GetResFlags(unsigned:Boolean):TResFlags;
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+ begin
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+ case NodeType of
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+ equaln:
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+ GetResFlags:=F_EQ;
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+ unequaln:
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+ GetResFlags:=F_NE;
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+ else
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+ if not(unsigned) then
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+ begin
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+ if nf_swapped in flags then
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+ case NodeType of
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+ ltn:
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+ GetResFlags:=F_GT;
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+ lten:
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+ GetResFlags:=F_GE;
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+ gtn:
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+ GetResFlags:=F_LT;
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+ gten:
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+ GetResFlags:=F_LE;
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+ end
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+ else
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+ case NodeType of
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+ ltn:
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+ GetResFlags:=F_LT;
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+ lten:
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+ GetResFlags:=F_LE;
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+ gtn:
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+ GetResFlags:=F_GT;
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+ gten:
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+ GetResFlags:=F_GE;
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+ end;
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+ end
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+ else
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+ begin
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+ if nf_swapped in Flags then
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+ case NodeType of
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+ ltn:
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+ GetResFlags:=F_HI;
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+ lten:
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+ GetResFlags:=F_CS;
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+ gtn:
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+ GetResFlags:=F_CC;
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+ gten:
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+ GetResFlags:=F_LS;
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+ end
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+ else
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+ case NodeType of
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+ ltn:
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+ GetResFlags:=F_CC;
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+ lten:
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+ GetResFlags:=F_LS;
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+ gtn:
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+ GetResFlags:=F_HI;
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+ gten:
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+ GetResFlags:=F_CS;
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+ end;
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+ end;
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+ end;
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+ end;
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+
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+
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+ procedure tavraddnode.second_cmpsmallset;
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+ var
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+ tmpreg : tregister;
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+ begin
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+ {
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+ pass_left_right;
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+
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+ location_reset(location,LOC_FLAGS,OS_NO);
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+
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+ force_reg_left_right(false,false);
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+
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+ case nodetype of
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+ equaln:
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+ begin
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+ current_asmdata.CurrAsmList.concat(taicpu.op_reg_reg(A_CMP,left.location.register,right.location.register));
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+ location.resflags:=F_EQ;
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+ end;
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+ unequaln:
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+ begin
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+ current_asmdata.CurrAsmList.concat(taicpu.op_reg_reg(A_CMP,left.location.register,right.location.register));
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+ location.resflags:=F_NE;
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+ end;
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+ lten,
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+ gten:
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+ begin
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+ if (not(nf_swapped in flags) and
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+ (nodetype = lten)) or
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+ ((nf_swapped in flags) and
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+ (nodetype = gten)) then
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+ swapleftright;
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+ tmpreg:=cg.getintregister(current_asmdata.CurrAsmList,location.size);
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+ current_asmdata.CurrAsmList.concat(taicpu.op_reg_reg_reg(A_AND,tmpreg,left.location.register,right.location.register));
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+ current_asmdata.CurrAsmList.concat(taicpu.op_reg_reg(A_CMP,tmpreg,right.location.register));
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+ location.resflags:=F_EQ;
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+ end;
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+ else
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+ internalerror(2004012401);
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+ end;
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+ }
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+ end;
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+
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+
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+ procedure tavraddnode.second_cmp64bit;
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+ var
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+ unsigned : boolean;
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+ oldnodetype : tnodetype;
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+ begin
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+ {
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+ pass_left_right;
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+ force_reg_left_right(false,false);
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+
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+ unsigned:=not(is_signed(left.resultdef)) or
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+ not(is_signed(right.resultdef));
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+
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+ { operation requiring proper N, Z and C flags ? }
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+ if unsigned or (nodetype in [equaln,unequaln]) then
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+ begin
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+ location_reset(location,LOC_FLAGS,OS_NO);
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+ location.resflags:=getresflags(unsigned);
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+ current_asmdata.CurrAsmList.concat(taicpu.op_reg_reg(A_CMP,left.location.register64.reghi,right.location.register64.reghi));
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+ current_asmdata.CurrAsmList.concat(setcondition(taicpu.op_reg_reg(A_CMP,left.location.register64.reglo,right.location.register64.reglo),C_EQ));
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+ end
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+ else
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+ { operation requiring proper N, Z and V flags ? }
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+ begin
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+ location_reset(location,LOC_JUMP,OS_NO);
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+ current_asmdata.CurrAsmList.concat(taicpu.op_reg_reg(A_CMP,left.location.register64.reghi,right.location.register64.reghi));
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+ { the jump the sequence is a little bit hairy }
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+ case nodetype of
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+ ltn,gtn:
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+ begin
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+ cg.a_jmp_flags(current_asmdata.CurrAsmList,getresflags(false),current_procinfo.CurrTrueLabel);
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+ { cheat a little bit for the negative test }
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+ toggleflag(nf_swapped);
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+ cg.a_jmp_flags(current_asmdata.CurrAsmList,getresflags(false),current_procinfo.CurrFalseLabel);
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+ toggleflag(nf_swapped);
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+ end;
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+ lten,gten:
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+ begin
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+ oldnodetype:=nodetype;
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+ if nodetype=lten then
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+ nodetype:=ltn
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+ else
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+ nodetype:=gtn;
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+ cg.a_jmp_flags(current_asmdata.CurrAsmList,getresflags(unsigned),current_procinfo.CurrTrueLabel);
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+ { cheat for the negative test }
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+ if nodetype=ltn then
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+ nodetype:=gtn
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+ else
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+ nodetype:=ltn;
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+ cg.a_jmp_flags(current_asmdata.CurrAsmList,getresflags(unsigned),current_procinfo.CurrFalseLabel);
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+ nodetype:=oldnodetype;
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+ end;
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+ end;
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+ current_asmdata.CurrAsmList.concat(taicpu.op_reg_reg(A_CMP,left.location.register64.reglo,right.location.register64.reglo));
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+ { the comparisaion of the low dword have to be
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+ always unsigned! }
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+ cg.a_jmp_flags(current_asmdata.CurrAsmList,getresflags(true),current_procinfo.CurrTrueLabel);
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+ cg.a_jmp_always(current_asmdata.CurrAsmList,current_procinfo.CurrFalseLabel);
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+ end;
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+ }
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+ end;
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+
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+
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+ function tavraddnode.pass_1 : tnode;
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+ begin
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+ result:=inherited pass_1;
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+
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+ { handling boolean expressions }
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+ if not(assigned(result)) and
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+ (
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+ not(is_boolean(left.resultdef)) or
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+ not(is_boolean(right.resultdef)) or
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+ is_dynamic_array(left.resultdef)
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+ ) then
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+ expectloc:=LOC_FLAGS;
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+ end;
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+
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+
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+ procedure tavraddnode.second_cmpordinal;
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+ var
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+ unsigned : boolean;
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+ tmpreg : tregister;
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+ b : byte;
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+ begin
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+ {
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+ pass_left_right;
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+ force_reg_left_right(true,true);
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+
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+ unsigned:=not(is_signed(left.resultdef)) or
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+ not(is_signed(right.resultdef));
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+
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+ if right.location.loc = LOC_CONSTANT then
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+ begin
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+ if is_shifter_const(right.location.value,b) then
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+ current_asmdata.CurrAsmList.concat(taicpu.op_reg_const(A_CMP,left.location.register,right.location.value))
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+ else
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+ begin
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+ tmpreg:=cg.getintregister(current_asmdata.CurrAsmList,location.size);
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+ cg.a_load_const_reg(current_asmdata.CurrAsmList,OS_INT,
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+ right.location.value,tmpreg);
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+ current_asmdata.CurrAsmList.concat(taicpu.op_reg_reg(A_CMP,left.location.register,tmpreg));
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+ end;
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+ end
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+ else
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+ current_asmdata.CurrAsmList.concat(taicpu.op_reg_reg(A_CMP,left.location.register,right.location.register));
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+
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+ location_reset(location,LOC_FLAGS,OS_NO);
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+ location.resflags:=getresflags(unsigned);
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+ }
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+ end;
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+
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+begin
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+ caddnode:=tavraddnode;
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+end.
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florian