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@@ -6869,7 +6869,12 @@ unit aoptx86;
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{ RegUsedAfterInstruction modifies TmpUsedRegs }
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not RegUsedAfterInstruction(NR_DEFAULTFLAGS, p_dist, TmpUsedRegs) then
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begin
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- DebugMsg(SPeepholeOptimization + 'CMP/JE/CMP/@Lbl/SETE -> CMP/SETE/CMP/SETE/OR, removing conditional branch', p);
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+ { Register can appear in p if it's not used afterwards, so only
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+ allocate between hp1 and hp1_dist }
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+ NewReg := GetIntRegisterBetween(R_SUBL, TmpUsedRegs, hp1, p_dist);
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+ if NewReg <> NR_NO then
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+ begin
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+ DebugMsg(SPeepholeOptimization + 'CMP/JE/CMP/@Lbl/SETE -> CMP/SETE/CMP/SETE/OR, removing conditional branch', p);
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{ Change the jump instruction into a SETcc instruction }
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taicpu(hp1).opcode := A_SETcc;
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@@ -6879,21 +6884,25 @@ unit aoptx86;
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{ This is now a dead label }
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tai_label(p_label).labsym.decrefs;
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- hp2 := taicpu.op_reg_reg(A_OR, S_B, NewReg, taicpu(p_dist).oper[0]^.reg);
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+ { Prefer adding before the next instruction so the FLAGS
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+ register is deallocated first }
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+ hp2 := taicpu.op_reg_reg(A_OR, S_B, NewReg, taicpu(p_dist).oper[0]^.reg);
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- { Try to add the instruction right after the flags get deallocated, since
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- the flags may become allocated again before the next instruction
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- (reuse p_dist, not hp1, since that needs to remain as the
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- instruction immediately after p) }
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- if SetAndTest(FindRegDealloc(NR_DEFAULTFLAGS, tai(p_dist.Next)), p_dist) then
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- AsmL.InsertAfter(hp2, p_dist)
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- else
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- AsmL.InsertBefore(hp2, hp1_dist);
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+ AsmL.InsertBefore(
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+ hp2,
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+ hp1_dist
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+ );
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- Result := True;
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- { Don't exit yet, as p wasn't changed and hp1, while
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- modified, is still intact and might be optimised by the
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- SETcc optimisation below }
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+ { Make sure the new register is in use over the new instruction
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+ (long-winded, but things work best when the FLAGS register
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+ is not allocated here) }
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+ AllocRegBetween(NewReg, p_dist, hp2, TmpUsedRegs);
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+
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+ Result := True;
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+ { Don't exit yet, as p wasn't changed and hp1, while
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+ modified, is still intact and might be optimised by the
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+ SETcc optimisation below }
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+ end;
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end;
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end;
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