+ added JRJP to various instruction lists

git-svn-id: trunk@45497 -

compiler/z80/aasmcpu.pas

@@ -1074,6 +1074,7 @@ implementation
           A_DJNZ,
           A_JR,
           A_JP,
+          A_JRJP,
           A_CALL,
           A_RET,
           A_RETI,

compiler/z80/aoptcpu.pas

@@ -200,7 +200,7 @@ Implementation
       if SuperRegistersEqual(reg,NR_DEFAULTFLAGS) and (reg<>NR_AF) then
         begin
           case p.opcode of
-            A_PUSH,A_POP,A_EX,A_EXX,A_NOP,A_HALT,A_DI,A_EI,A_IM,A_SET,A_RES,A_JP,A_JR,A_DJNZ,A_CALL,A_RET,A_RETI,A_RETN,A_RST,A_OUT:
+            A_PUSH,A_POP,A_EX,A_EXX,A_NOP,A_HALT,A_DI,A_EI,A_IM,A_SET,A_RES,A_JP,A_JR,A_JRJP,A_DJNZ,A_CALL,A_RET,A_RETI,A_RETN,A_RST,A_OUT:
               result:=false;
             A_LD:
               begin
@@ -303,7 +303,7 @@ Implementation
           A_PUSH,A_EX,A_EXX,A_LDI,A_LDIR,A_LDD,A_LDDR,A_CPI,A_CPIR,A_CPD,A_CPDR,
           A_ADD,A_ADC,A_SBC,A_CP,A_INC,A_DEC,A_DAA,A_CPL,A_NEG,A_CCF,A_SCF,
           A_NOP,A_HALT,A_DI,A_EI,A_IM,A_RLCA,A_RLA,A_RRCA,A_RRA,A_RLC,A_RL,
-          A_RRC,A_RR,A_SLA,A_SRA,A_SRL,A_RLD,A_RRD,A_BIT,A_SET,A_RES,A_JP,A_JR,
+          A_RRC,A_RR,A_SLA,A_SRA,A_SRL,A_RLD,A_RRD,A_BIT,A_SET,A_RES,A_JP,A_JR,A_JRJP,
           A_DJNZ,A_CALL,A_RET,A_RETI,A_RETN,A_RST,A_INI,A_INIR,A_IND,A_INDR,
           A_OUT,A_OUTI,A_OTIR,A_OUTD,A_OTDR:
             result:=false;
@@ -421,7 +421,7 @@ Implementation
           end;
         A_RLD,A_RRD:
           result:=RegistersInterfere(reg,NR_A) or RegistersInterfere(reg,NR_HL);
-        A_JP,A_JR:
+        A_JP,A_JR,A_JRJP:
           begin
             if p.ops<>1 then
               internalerror(2020051107);

compiler/z80/aoptcpub.pas

@@ -104,8 +104,8 @@ Const
 
   StoreDst = 0;
 
-  aopt_uncondjmp = [A_JP,A_JR];
-  aopt_condjmp = [A_JP,A_JR];
+  aopt_uncondjmp = [A_JP,A_JR,A_JRJP];
+  aopt_condjmp = [A_JP,A_JR,A_JRJP];
 
 Implementation
 
@@ -197,7 +197,7 @@ Uses
       case p.opcode of
         A_LD,A_EX,A_ADD,A_ADC,A_SUB,A_SBC,A_AND,A_OR,A_XOR,A_CP,A_INC,A_DEC,
         A_CCF,A_SCF,A_NOP,A_HALT,A_DI,A_EI,A_IM,A_RLC,A_RL,A_RRC,A_RR,A_SLA,
-        A_SRA,A_SRL,A_BIT,A_SET,A_RES,A_JP,A_JR,A_CALL,A_RET,A_RETI,A_RETN,
+        A_SRA,A_SRL,A_BIT,A_SET,A_RES,A_JP,A_JR,A_JRJP,A_CALL,A_RET,A_RETI,A_RETN,
         A_RST,A_IN,A_OUT:
           ;
         A_PUSH,A_POP:
@@ -226,7 +226,7 @@ Uses
       if not result and SuperRegistersEqual(reg,NR_DEFAULTFLAGS) then
         begin
           case p.opcode of
-            A_PUSH,A_POP,A_EX,A_EXX,A_NOP,A_HALT,A_DI,A_EI,A_IM,A_SET,A_RES,A_JP,A_JR,A_DJNZ,A_CALL,A_RET,A_RETI,A_RETN,A_RST,A_OUT:
+            A_PUSH,A_POP,A_EX,A_EXX,A_NOP,A_HALT,A_DI,A_EI,A_IM,A_SET,A_RES,A_JP,A_JR,A_JRJP,A_DJNZ,A_CALL,A_RET,A_RETI,A_RETN,A_RST,A_OUT:
               result:=false;
             A_LD:
               begin

compiler/z80/cpubase.pas

@@ -59,11 +59,11 @@ unit cpubase;
 
       { call/reg instructions are not considered as jmp instructions for the usage cases of
         this set }
-      jmp_instructions = [A_JP,A_JR,A_DJNZ];
+      jmp_instructions = [A_JP,A_JR,A_JRJP,A_DJNZ];
       call_jmp_instructions = [A_CALL]+jmp_instructions;
 
       { instructions that can have a condition }
-      cond_instructions = [A_CALL,A_JP,A_JR,A_RET];
+      cond_instructions = [A_CALL,A_JP,A_JR,A_JRJP,A_RET];
 
 {*****************************************************************************
                                   Registers

compiler/z80/raz80asm.pas

@@ -163,7 +163,7 @@ Unit raz80asm;
         c:=scanner.c;
         { certain instructions can have a condition, as an operand. We need to set this flag,
           because 'C' can be either a register, or a condition, depending on the context }
-        can_be_condition:=(actasmtoken=AS_OPCODE) and (actopcode in [A_JP,A_JR,A_CALL,A_RET]);
+        can_be_condition:=(actasmtoken=AS_OPCODE) and (actopcode in [A_JP,A_JR,A_JRJP,A_CALL,A_RET]);
         { save old token and reset new token }
         prevasmtoken:=actasmtoken;
         actasmtoken:=AS_NONE;