* m68k/n68kadd.pas, t68kaddnode.second_cmpsmallset:

    respect more location combinations than just LOC_CONSTANT and LOC_REGISTER
* added test

git-svn-id: trunk@22786 -

.gitattributes

@@ -9662,6 +9662,7 @@ tests/tbs/tb0582.pp svneol=native#text/pascal
 tests/tbs/tb0583.pp svneol=native#text/plain
 tests/tbs/tb0583a.pp svneol=native#text/plain
 tests/tbs/tb0584.pp svneol=native#text/pascal
+tests/tbs/tb0585.pp svneol=native#text/pascal
 tests/tbs/tb205.pp svneol=native#text/plain
 tests/tbs/ub0060.pp svneol=native#text/plain
 tests/tbs/ub0069.pp svneol=native#text/plain

compiler/m68k/n68kadd.pas

@@ -217,8 +217,11 @@ implementation
 
     procedure t68kaddnode.second_cmpsmallset;
      var
-      tmpreg : tregister;
+       leftreg,
+       rightreg : tregister;
      begin
+       pass_left_right;
+
        location_reset(location,LOC_FLAGS,OS_NO);
 
        case nodetype of
@@ -229,35 +232,60 @@ implementation
             end;
           lten,gten:
             begin
-              If (not(nf_swapped in flags) and
+              if (not(nf_swapped in flags) and
                   (nodetype = lten)) or
                  ((nf_swapped in flags) and
                   (nodetype = gten)) then
                 swapleftright;
               // now we have to check whether left >= right
-              tmpreg := cg.getintregister(current_asmdata.CurrAsmList,OS_INT);
-              if left.location.loc = LOC_CONSTANT then
-                begin
-                  cg.a_op_const_reg_reg(current_asmdata.CurrAsmList,OP_AND,OS_INT,
-                    not(left.location.value),right.location.register,tmpreg);
-                  current_asmdata.CurrAsmList.concat(taicpu.op_reg(A_TST,S_L,tmpreg));
-                  // the two instructions above should be folded together by
-                  // the peepholeoptimizer
-                end
-              else
-                begin
-                  if right.location.loc = LOC_CONSTANT then
-                    begin
-                      cg.a_load_const_reg(current_asmdata.CurrAsmList,OS_INT,
-                        aword(right.location.value),tmpreg);
-                      current_asmdata.CurrAsmList.concat(taicpu.op_reg_reg(A_AND,S_L,
-                        tmpreg,left.location.register));
-                    end
-                  else
+
+              // first load right into a register
+              case right.location.loc of
+                LOC_CONSTANT:
+                  begin
+                    rightreg:=cg.getintregister(current_asmdata.CurrAsmList,OS_INT);
+                    cg.a_load_const_reg(current_asmdata.CurrAsmList,OS_INT,
+                      aword(right.location.value),rightreg);
+                  end;
+                LOC_REFERENCE:
+                  begin
+                    rightreg:=cg.getintregister(current_asmdata.CurrAsmList,OS_INT);
+                    cg.a_load_ref_reg(current_asmdata.CurrAsmList,OS_INT,OS_INT,right.location.reference,rightreg);
+                  end;
+                LOC_REGISTER:
+                  begin
+                    rightreg:=right.location.register;
+                  end;
+                else
+                  internalerror(2012102001);
+              end;
+
+              // now process left
+              case left.location.loc of
+                LOC_CONSTANT:
+                  begin
+                    leftreg:=cg.getintregister(current_asmdata.CurrAsmList,OS_INT);
+                    cg.a_op_const_reg_reg(current_asmdata.CurrAsmList,OP_AND,OS_INT,
+                      not(left.location.value),rightreg,leftreg);
+                    current_asmdata.CurrAsmList.concat(taicpu.op_reg(A_TST,S_L,leftreg));
+                    // the two instructions above should be folded together by
+                    // the peepholeoptimizer
+                  end;
+                LOC_REFERENCE:
+                  begin
+                    leftreg:=cg.getintregister(current_asmdata.CurrAsmList,OS_INT);
+                    cg.a_load_ref_reg(current_asmdata.CurrAsmList,OS_INT,OS_INT,left.location.reference,leftreg);
                     current_asmdata.CurrAsmList.concat(taicpu.op_reg_reg(A_AND,S_L,
-                      right.location.register,left.location.register));
-                end;
-//              cg.ungetcpuregister(current_asmdata.CurrAsmList,tmpreg);
+                      rightreg,leftreg));
+                  end;
+                LOC_REGISTER:
+                  begin
+                    current_asmdata.CurrAsmList.concat(taicpu.op_reg_reg(A_AND,S_L,
+                      rightreg,left.location.register));
+                  end;
+                else
+                  internalerror(2012102002);
+              end;
               location.resflags := getresflags(true);
             end;
           else

tests/tbs/tb0585.pp

@@ -0,0 +1,27 @@
+{ %NORUN }
+
+program tb0585;
+
+{$mode objfpc}
+
+type
+  tobjectoptions = set of (oo_is_external, oo_is_forward, oo_is_formal);
+
+  tobjectdef = class
+    objectoptions: tobjectoptions;
+  end;
+
+procedure finalize_class_external_status(od: tobjectdef);
+  begin
+    if  [oo_is_external,oo_is_forward] <= od.objectoptions then
+      begin
+        { formal definition: x = objcclass external; }
+        exclude(od.objectoptions,oo_is_forward);
+        include(od.objectoptions,oo_is_formal);
+      end;
+  end;
+
+
+begin
+
+end.