+ RiscV has internal rol/r support

compiler/fpcdefs.inc

@@ -345,6 +345,7 @@
   {$define cpu32bit}
   {$define cpu32bitaddr}
   {$define cpu32bitalu}
+  {$define cpurox}
   {$define cpufpemu}
   {$define cputargethasfixedstack}
   {$define cpuneedsmulhelper}
@@ -372,6 +373,7 @@
   {$define cpu64bit}
   {$define cpu64bitaddr}
   {$define cpu64bitalu}
+  {$define cpurox}
   {$define cpufpemu}
   {$define cputargethasfixedstack}
   {$define cpuneedsmulhelper}

compiler/options.pas

@@ -4832,9 +4832,12 @@ procedure read_arguments(cmd:TCmdStr);
 
       { these cpus have an inline rol/ror implementaion }
       {$ifdef cpurox}
-      {$ifdef m68k}
+      {$if defined(m68k)}
         if CPUM68K_HAS_ROLROR in cpu_capabilities[init_settings.cputype] then
           def_system_macro('FPC_HAS_INTERNAL_ROX');
+      {$elseif defined(riscv)}
+        if [CPURV_HAS_ZBB,CPURV_HAS_ZBKB]*cpu_capabilities[init_settings.cputype]<>[] then
+          def_system_macro('FPC_HAS_INTERNAL_ROX');
       {$else}
         def_system_macro('FPC_HAS_INTERNAL_ROX');
       {$endif}