Fix ShiftShift2Shift 1 ARM-peephole optimizer

The previous code deleted the newly inserted instruction instead of the
existing one, which obviously broke code.

Assembly:
  mov r0, r0, lsr #23
  mov r0, r0, lsr #23

transformed into:
  mov r0, r0, lsr #23

expected was:
  mov r0, #0

The problem only shows up in the very unlikely case of two LSR/ASR or
two LSL following on each other and having a total shift of more than 31
bits.

This fixes test/opt/tarmshift.pp

I've also removed the {%norun} directive from tarmshift.pp as this test
does only make sense when it also runs.

git-svn-id: trunk@25374 -

compiler/arm/aoptcpu.pas

@@ -838,10 +838,10 @@ Implementation
                                 SM_LSR,
                                 SM_LSL:
                                   begin
-                                    hp1:=taicpu.op_reg_const(A_MOV,taicpu(p).oper[0]^.reg,0);
-                                    InsertLLItem(p.previous, p.next, hp1);
+                                    hp2:=taicpu.op_reg_const(A_MOV,taicpu(p).oper[0]^.reg,0);
+                                    InsertLLItem(p.previous, p.next, hp2);
                                     p.free;
-                                    p:=hp1;
+                                    p:=hp2;
                                   end;
                                 else
                                   internalerror(2008072803);

tests/test/opt/tarmshift.pp

@@ -1,4 +1,3 @@
-{ %norun }
 { %opt=-O2 }
 var
   i : longint;